CDB4340A

CDB4340A Datasheet

CDB4340A/41A

Part	Datasheet
CDB4340A	CDB4340A (pdf)

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CDB4340A/41A Evaluation Board for CS4340A and CS4341A Demonstrates recommended layout and grounding arrangements CS8414 Receives AES/EBU, S/PDIF, & EIAJ-340 Compatible Digital Audio Digital and Analog Patch Areas Requires only a digital signal source and power supplies for a complete Digital-toAnalog-Converter system The CDB4340A/41A evaluation board is an excellent means for quickly evaluating the CS4340A/41A family of 24-bit, stereo D/A converters. Evaluation requires an analog signal analyzer, a digital signal source, a PC for controlling the CS4341A and a power supply. Analog outputs are provided via RCA phono jacks for both channels. The CS8414 digital audio receiver I.C. provides the system timing necessary to operate the Digital-to-Analog converters and will accept AES/EBU, S/PDIF, and EIAJ340 compatible audio data. The evaluation board may also be configured to accept external timing signals for operation in a user application during system development. ORDERING INFORMATION CDB4340A, CDB4341A Evaluation Board I/O for Clocks and Data Control Port Mute Circuit CS8414 Digital Audio Interface CS4340A/41A Analog Filter Cirrus Logic, Inc. P.O. Box 17847, Austin, Texas 78760 512 445 7222 FAX 512 445 7581 Copyright Cirrus Logic, Inc. 2002 All Rights Reserved JUN ‘02 DS590DB1 1 CDB4340A/41A TABLE OF CONTENTS CDB4340A/41A SYSTEM OVERVIEW 4 CDB4340A/41A ERRATA 4 CS4340A/41A DIGITAL TO ANALOG CONVERTER 4 CS8414 DIGITAL AUDIO RECEIVER 4 CS8414 DATA FORMAT 4 ANALOG OUTPUT FILTER 5 INPUT/OUTPUT FOR CLOCKS AND DATA 5 POWER SUPPLY CIRCUITRY 5 GROUNDING AND POWER SUPPLY DECOUPLING 5 CDB4341A CONTROL PORT SOFTWARE 5 LIST OF FIGURES Figure System Block Diagram and Signal Flow 9 Figure CS4340A/41A 10 Figure Analog Output Passive Filter 11 Figure External Mute Circuit 12 Figure CS8414 Digital Audio Receiver Connections 13 Figure Digital Audio Inputs 14 Figure MCLK Divider and Voltage Level Converter 15 Figure Control Port Interface 16 Figure Reset Circuitry 17 Figure Power Supply 18 Figure I/O for Clocks and Data 19 Figure Silkscreen Top 20 Figure Top Side 21 Figure Bottom Side 22 Contacting Cirrus Logic Support For a complete listing of Direct Sales, Distributor, and Sales Representative contacts, visit the Cirrus Logic web site at: IMPORTANT NOTICE "Preliminary" product information describes products that are in production, but for which full characterization data is not yet available. "Advance" product information describes products that are in development and subject to development changes. Cirrus Logic, Inc. and its subsidiaries "Cirrus" believe that the information contained in this document is accurate and reliable. However, the information is subject to change without notice and is provided "AS IS" without warranty of any kind express or implied . Customers are advised to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, patent infringement, and limitation of liability. No responsibility is assumed by Cirrus for the use of this information, including use of this information as the basis for manufacture or sale of any items, or for infringement of patents or other rights of third parties. This document is the property of Cirrus and by furnishing this information, Cirrus grants no license, express or implied under any patents, mask work rights, copyrights, trademarks, trade secrets or other intellectual property rights. Cirrus owns the copyrights of the information contained herein and gives consent for copies to be made of the information only for use within your organization with respect to Cirrus integrated circuits or other parts of Cirrus. This consent does not extend to other copying such as copying for general distribution, advertising or promotional purposes, or for creating any work for resale. An export permit needs to be obtained from the competent authorities of the Japanese Government if any of the products or technologies described in this material and controlled under the "Foreign Exchange and Foreign Trade Law" is to be exported or taken out of Japan. An export license and/or quota needs to be obtained from the competent authorities of the Chinese Government if any of the products or technologies described in this material is subject to the PRC Foreign Trade Law and is to be exported or taken out of the PRC. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE "CRITICAL APPLICATIONS" . CIRRUS PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF CIRRUS PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER'S RISK. Cirrus Logic, Cirrus, and the Cirrus Logic logo designs are trademarks of Cirrus Logic, Inc. All other brand and product names in this document may be trademarks or service marks of their respective owners. DS590DB1 CDB4340A/41A LIST OF TABLES Table CS8414 Supported Formats 4 Table System Connections 6 Table CDB4340A Jumper Selectable Options 6 Table CDB4341A I2C Mode Jumper Selectable Options 7 Table CDB4341A SPI Mode Jumper Selectable Options............................... 8 DS590DB1 CDB4340A/41A CDB4340A/41A SYSTEM OVERVIEW The CDB4340A/41A evaluation board is an excellent means of quickly evaluating the CS4340A/41A. The CS8414 digital audio interface receiver provides an easy interface to digital audio signal sources including the majority of digital audio test equipment. The evaluation board also allows the user to supply clocks and data through a 10-pin header for system development. The CDB4340A/41A schematic has been partitioned into 10 schematics shown in Figures 2 through Each partitioned schematic is represented in the system diagram shown in Figure Notice that the system diagram also includes the interconnections between the partitioned schematics. CDB4340A/41A ERRATA The CS4340A is mounted on the same PCB used to evaluate the CS4340. Please see tables 3 to 5 for jumper settings that are not applicable to the CDB4340A/41A. These jumpers should retain the default setting from the factory. Also, all SDATA net names for the CS4340A shall be interpreted as SDIN, as seen in the pin description of the CS4340A datasheet. CS4340A/41A DIGITAL TO ANALOG CONVERTER A description of the CS4340A is included in the CS4340A data sheet. A description of the CS4341A is included in the CS4341A data sheet. CS8414 DIGITAL AUDIO RECEIVER The system receives and decodes the standard S/PDIF data format using a CS8414 Digital Audio Receiver, Figure The outputs of the CS8414 include a serial bit clock, serial data, left-right clock FSYNC , and a 256 Fs master clock. The operation of the CS8414 and a discussion of the digital

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CDB4340A/41A

Evaluation Board for CS4340A and CS4341A

Demonstrates recommended layout and grounding arrangements CS8414 Receives AES/EBU, S/PDIF, & EIAJ-340 Compatible Digital Audio Digital and Analog Patch Areas Requires only a digital signal source and power supplies for a complete Digital-toAnalog-Converter system

The CDB4340A/41A evaluation board is an excellent means for quickly evaluating the CS4340A/41A family of 24-bit, stereo D/A converters. Evaluation requires an analog signal analyzer, a digital signal source, a PC for controlling the CS4341A and a power supply. Analog outputs are provided via RCA phono jacks for both channels.

The CS8414 digital audio receiver I.C. provides the system timing necessary to operate the Digital-to-Analog converters and will accept AES/EBU, S/PDIF, and EIAJ340 compatible audio data. The evaluation board may also be configured to accept external timing signals for operation in a user application during system development.
ORDERING INFORMATION CDB4340A, CDB4341A

Evaluation Board

I/O for Clocks and Data

Control Port

Mute Circuit

CS8414

Digital Audio Interface

CS4340A/41A

Analog Filter

Cirrus Logic, Inc. P.O. Box 17847, Austin, Texas 78760 512 445 7222 FAX 512 445 7581

Copyright Cirrus Logic, Inc. 2002

All Rights Reserved

JUN ‘02

DS590DB1 1

CDB4340A/41A

TABLE OF CONTENTS

CDB4340A/41A SYSTEM OVERVIEW 4 CDB4340A/41A ERRATA 4 CS4340A/41A DIGITAL TO ANALOG CONVERTER 4 CS8414 DIGITAL AUDIO RECEIVER 4 CS8414 DATA FORMAT 4 ANALOG OUTPUT FILTER 5 INPUT/OUTPUT FOR CLOCKS AND DATA 5 POWER SUPPLY CIRCUITRY 5 GROUNDING AND POWER SUPPLY DECOUPLING 5 CDB4341A CONTROL PORT SOFTWARE 5

LIST OF FIGURES

Figure System Block Diagram and Signal Flow 9 Figure CS4340A/41A 10 Figure Analog Output Passive Filter 11 Figure External Mute Circuit 12 Figure CS8414 Digital Audio Receiver Connections 13 Figure Digital Audio Inputs 14 Figure MCLK Divider and Voltage Level Converter 15 Figure Control Port Interface 16 Figure Reset Circuitry 17 Figure Power Supply 18 Figure I/O for Clocks and Data 19 Figure Silkscreen Top 20 Figure Top Side 21 Figure Bottom Side 22

Contacting Cirrus Logic Support

For a complete listing of Direct Sales, Distributor, and Sales Representative contacts, visit the Cirrus Logic web site at:

IMPORTANT NOTICE
"Preliminary" product information describes products that are in production, but for which full characterization data is not yet available. "Advance" product information describes products that are in development and subject to development changes. Cirrus Logic, Inc. and its subsidiaries "Cirrus" believe that the information contained in this document is accurate and reliable. However, the information is subject to change without notice and is provided "AS IS" without warranty of any kind express or implied . Customers are advised to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, patent infringement, and limitation of liability. No responsibility is assumed by Cirrus for the use of this information, including use of this information as the basis for manufacture or sale of any items, or for infringement of patents or other rights of third parties. This document is the property of Cirrus and by furnishing this information, Cirrus grants no license, express or implied under any patents, mask work rights, copyrights, trademarks, trade secrets or other intellectual property rights. Cirrus owns the copyrights of the information contained herein and gives consent for copies to be made of the information only for use within your organization with respect to Cirrus integrated circuits or other parts of Cirrus. This consent does not extend to other copying such as copying for general distribution, advertising or promotional purposes, or for creating any work for resale.

An export permit needs to be obtained from the competent authorities of the Japanese Government if any of the products or technologies described in this material and controlled under the "Foreign Exchange and Foreign Trade Law" is to be exported or taken out of Japan. An export license and/or quota needs to be obtained from the competent authorities of the Chinese Government if any of the products or technologies described in this material is subject to the PRC Foreign Trade Law and is to be exported or taken out of the PRC.

CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE "CRITICAL APPLICATIONS" . CIRRUS PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF CIRRUS PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER'S RISK.

Cirrus Logic, Cirrus, and the Cirrus Logic logo designs are trademarks of Cirrus Logic, Inc. All other brand and product names in this document may be trademarks or service marks of their respective owners.

DS590DB1

CDB4340A/41A

LIST OF TABLES

Table CS8414 Supported Formats 4 Table System Connections 6 Table CDB4340A Jumper Selectable Options 6 Table CDB4341A I2C Mode Jumper Selectable Options 7 Table CDB4341A SPI Mode Jumper Selectable Options............................... 8

DS590DB1

CDB4340A/41A

CDB4340A/41A SYSTEM OVERVIEW

The CDB4340A/41A evaluation board is an excellent means of quickly evaluating the CS4340A/41A. The CS8414 digital audio interface receiver provides an easy interface to digital audio signal sources including the majority of digital audio test equipment. The evaluation board also allows the user to supply clocks and data through a 10-pin header for system development.

The CDB4340A/41A schematic has been partitioned into 10 schematics shown in Figures 2 through Each partitioned schematic is represented in the system diagram shown in Figure Notice that the system diagram also includes the interconnections between the partitioned schematics.

CDB4340A/41A ERRATA

The CS4340A is mounted on the same PCB used to evaluate the CS4340. Please see tables 3 to 5 for jumper settings that are not applicable to the CDB4340A/41A. These jumpers should retain the default setting from the factory. Also, all SDATA net names for the CS4340A shall be interpreted as SDIN, as seen in the pin description of the CS4340A datasheet.

CS4340A/41A DIGITAL TO ANALOG CONVERTER

A description of the CS4340A is included in the CS4340A data sheet. A description of the CS4341A is included in the CS4341A data sheet.

CS8414 DIGITAL AUDIO RECEIVER

The system receives and decodes the standard S/PDIF data format using a CS8414 Digital Audio Receiver, Figure The outputs of the CS8414 include a serial bit clock, serial data, left-right clock FSYNC , and a 256 Fs master clock. The operation of the CS8414 and a discussion of the digital

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Datasheet ID: CDB4340A 523119