CDB42324

CDB42324 Datasheet

CDB42324

Part	Datasheet
CDB42324	CDB42324 (pdf)

PDF Datasheet Preview
CDB42324 Evaluation Board for CS42324 2 Vrms Single-Ended Analog Inputs 2 Vrms Single-Ended Analog Outputs CS8406 S/PDIF Digital Audio Transmitter CS8416 S/PDIF Digital Audio Receiver Independent ADC and DAC Clock Domains Header for Optional External Software Configuration of CS42324 Header for External PCM Serial Audio I/O V Logic Interface Pre-Defined Software Scripts Demonstrates Recommended Layout and Grounding Arrangements Compatible Software Interface to Configure CS42324 and Intra-board Connections The CDB42324 evaluation board is an excellent means for evaluating the CS42324 CODEC. Evaluation requires an analog signal source and analyzer and power supplies. A Windows PC-compatible computer must be used to evaluate the CS42324. System timing for the and Left-Justified interface formats can be provided by the CS42324, the CS8416, the CS8406, or by a PCM I/O stake header with an external source connected. RCA phono jacks are provided for the CS42324 analog inputs and outputs. Digital data I/O is available via RCA phono or optical connectors to the CS8416 and CS8406. The Windows software provides a GUI to make configuration of the CDB42324 easy. The software communicates through the PC’s USB port to configure the control port registers so that features of the CS42324 can be evaluated. The evaluation board may also be configured to accept external timing and data signals for operation in a user application during system development. ORDERING INFORMATION CDB42324 Evaluation Board Passive Input Filter Passive Input Filter Passive Input Filter Passive Input Filter Passive Input Filter Header MCLK1 Subclocks 1 MCLK2 Subclocks 2 CS8416 MCLK Subclocks CS42324 Passive Output Filter Passive Output Filter Passive Output Filter MCLK1 Subclocks 1 MCLK2 Subclocks 2 Control Port Interface CS8416 CS8406 FPGA Canned MCLK Oscillator MCLK Subclocks CS8406 Copyright Cirrus Logic, Inc. 2007 All Rights Reserved MAY '07 DS721DB2 CDB42324 TABLE OF CONTENTS SYSTEM OVERVIEW 4 Power 4 Grounding and Power Supply Decoupling 4 CS42324 Audio CODEC 4 CS8406 Digital Audio Transmitter 4 CS8416 Digital Audio Receiver 5 FPGA 5 Canned Oscillator 5 External Control Headers 5 Analog Inputs 5 Analog Outputs 5 Muting 6 USB Control Port 6 SYSTEM CLOCKING 7 Clock Domain 1 7 Clock Domain 2 7 SYSTEM DATA ROUTING 7 PC SOFTWARE CONTROL 8 CS42324 System Controls Tab 8 CS42324 ADC and DAC Controls Tab 9 Board Setup Tab 10 Register Maps Tab 11 Preconfigured Script Files 12 DS721DB2 CDB42324 LIST OF FIGURES Figure 1.CS42324 System Controls Tab 8 Figure 2.CS42324 ADC and DAC Controls Tab 9 Figure 3.Board Setup Tab 10 Figure 4.Register Maps Tab 11 Figure 5.CS42324 - Schematic Page 1 18 Figure 6.Analog Inputs - Schematic Page 2 19 Figure 7.Analog Outputs - Schematic Page 3 20 Figure 8.Clock Routing and Board Control - Schematic Page 4 21 Figure 9.S/PDIF I/O - Schematic Page 5 22 Figure 10.FPGA - Schematic Page 6 23 Figure 11.Power - Schematic Page 7 24 Figure 12.Silk-screen Top 25 Figure 13.Silk-screen Bottom 26 Figure 14.Top Layer Routing 27 Figure 15.Bottom Layer Routing 28 LIST OF TABLES Table MCLK2 Source 13 Table MCLK1 Source 14 Table SP2 Subclock Source 14 Table SP1 Subclock Source 15 Table SDATA Source 15 Table CS42324 AD0 State 16 Table CS42324 AD1 State 16 Table System Connections 17 Table System Jumper Settings 17 DS721DB2 CDB42324 SYSTEM OVERVIEW The CDB42324 evaluation board is an excellent means for evaluating the CS42324 CODEC. Analog and digital audio signal interfaces are provided, an on-board FPGA is used for easily configuring the evaluation platform, and a USB cable is included for use with the supplied Windows configuration software. The CDB42324 schematic set is shown in Figures 5 through Power Power must be supplied to the evaluation board through the Yellow V to V binding post. Onboard regulators provide 5 V, V, and V supplies. All voltage inputs must be referenced to the single black binding post ground connector Table WARNING Please refer to the CS42324 data sheet for allowable voltage levels. Grounding and Power Supply Decoupling The CS42324 requires careful attention to power supply and grounding arrangements to optimize performance. Figure 5 provides an overview of the connections to the CS42324. Figure 12 shows the component placement. Figure 14 shows the top layout. Figure 15 shows the bottom layout. The decoupling capacitors are located as close to the CS42324 as possible. Extensive use of ground plane fill in the evaluation board yields large reductions in radiated noise.

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CDB42324

Evaluation Board for CS42324
2 Vrms Single-Ended Analog Inputs
2 Vrms Single-Ended Analog Outputs

CS8406 S/PDIF Digital Audio Transmitter

CS8416 S/PDIF Digital Audio Receiver

Independent ADC and DAC Clock Domains

Header for Optional External Software Configuration of CS42324

Header for External PCM Serial Audio I/O

V Logic Interface

Pre-Defined Software Scripts

Demonstrates Recommended Layout and Grounding Arrangements

Compatible Software Interface to Configure CS42324 and Intra-board Connections

The CDB42324 evaluation board is an excellent means for evaluating the CS42324 CODEC. Evaluation requires an analog signal source and analyzer and power supplies. A Windows PC-compatible computer must be used to evaluate the CS42324.

System timing for the and Left-Justified interface formats can be provided by the CS42324, the CS8416, the CS8406, or by a PCM I/O stake header with an external source connected.

RCA phono jacks are provided for the CS42324 analog inputs and outputs. Digital data I/O is available via RCA phono or optical connectors to the CS8416 and CS8406.

The Windows software provides a GUI to make configuration of the CDB42324 easy. The software communicates through the PC’s USB port to configure the control port registers so that features of the CS42324 can be evaluated. The evaluation board may also be configured to accept external timing and data signals for operation in a user application during system development.
ORDERING INFORMATION CDB42324

Evaluation Board

Passive Input Filter Passive Input Filter Passive Input Filter Passive Input Filter Passive Input Filter

Header

MCLK1 Subclocks 1

MCLK2 Subclocks 2

CS8416

MCLK Subclocks

CS42324

Passive Output Filter Passive Output Filter Passive Output Filter

MCLK1 Subclocks 1

MCLK2 Subclocks 2

Control Port Interface

CS8416

CS8406

FPGA

Canned MCLK Oscillator

MCLK Subclocks

CS8406

Copyright Cirrus Logic, Inc. 2007 All Rights Reserved

MAY '07 DS721DB2

CDB42324

TABLE OF CONTENTS

SYSTEM OVERVIEW 4 Power 4 Grounding and Power Supply Decoupling 4 CS42324 Audio CODEC 4 CS8406 Digital Audio Transmitter 4 CS8416 Digital Audio Receiver 5 FPGA 5 Canned Oscillator 5 External Control Headers 5 Analog Inputs 5 Analog Outputs 5 Muting 6 USB Control Port 6

SYSTEM CLOCKING 7 Clock Domain 1 7 Clock Domain 2 7

SYSTEM DATA ROUTING 7 PC SOFTWARE CONTROL 8

CS42324 System Controls Tab 8 CS42324 ADC and DAC Controls Tab 9 Board Setup Tab 10 Register Maps Tab 11 Preconfigured Script Files 12

DS721DB2

CDB42324

LIST OF FIGURES

Figure 1.CS42324 System Controls Tab 8 Figure 2.CS42324 ADC and DAC Controls Tab 9 Figure 3.Board Setup Tab 10 Figure 4.Register Maps Tab 11 Figure 5.CS42324 - Schematic Page 1 18 Figure 6.Analog Inputs - Schematic Page 2 19 Figure 7.Analog Outputs - Schematic Page 3 20 Figure 8.Clock Routing and Board Control - Schematic Page 4 21 Figure 9.S/PDIF I/O - Schematic Page 5 22 Figure 10.FPGA - Schematic Page 6 23 Figure 11.Power - Schematic Page 7 24 Figure 12.Silk-screen Top 25 Figure 13.Silk-screen Bottom 26 Figure 14.Top Layer Routing 27 Figure 15.Bottom Layer Routing 28

LIST OF TABLES

Table MCLK2 Source 13 Table MCLK1 Source 14 Table SP2 Subclock Source 14 Table SP1 Subclock Source 15 Table SDATA Source 15 Table CS42324 AD0 State 16 Table CS42324 AD1 State 16 Table System Connections 17 Table System Jumper Settings 17

DS721DB2

CDB42324

SYSTEM OVERVIEW

The CDB42324 evaluation board is an excellent means for evaluating the CS42324 CODEC. Analog and digital audio signal interfaces are provided, an on-board FPGA is used for easily configuring the evaluation platform, and a USB cable is included for use with the supplied Windows configuration software. The CDB42324 schematic set is shown in Figures 5 through

Power

Power must be supplied to the evaluation board through the Yellow V to V binding post. Onboard regulators provide 5 V, V, and V supplies. All voltage inputs must be referenced to the single black binding post ground connector Table WARNING Please refer to the CS42324 data sheet for allowable voltage levels.

Grounding and Power Supply Decoupling

The CS42324 requires careful attention to power supply and grounding arrangements to optimize performance. Figure 5 provides an overview of the connections to the CS42324. Figure 12 shows the component placement. Figure 14 shows the top layout. Figure 15 shows the bottom layout. The decoupling capacitors are located as close to the CS42324 as possible. Extensive use of ground plane fill in the evaluation board yields large reductions in radiated noise.

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived CDB42324 Datasheet file may be downloaded here without warranties.

Datasheet ID: CDB42324 523117