PCI9056RDK-LITE

PCI9056RDK-LITE Datasheet

Connectivity s 32-bit, 66MHz PCI r2.2 compliant s Motorola PowerQUICC and

Part	Datasheet
PCI9056RDK-LITE	PCI9056RDK-LITE (pdf)

Related Parts	Information
PCI9056-BA66BI	PCI9056-BA66BI
PCI9056-BA66BI G	PCI9056-BA66BI G

PDF Datasheet Preview
VERSION 2002 Connectivity s 32-bit, 66MHz PCI r2.2 compliant s Motorola PowerQUICC and generic 32-bit, 66MHz local bus modes s 3.3V I/O, 5V tolerant bus interfaces s PICMG r2.0 Hot Swap Silicon s 256-ball, 17 x 17 mm, mm fine pitch PBGA FPBGA Performance s Zero wait state burst operation PCI bus bursts to 264 MB/sec Local bus bursts to 264 MB/sec s 2 DMA Channels Block & Scatter/Gather transfers DMA descriptor ring management Demand Mode & EOT H/W controls s Direct Master data transfers Generate any PCI transaction Read ahead and programmable read prefetch counter s Direct Slave data transfers Access 8-, 16-, and 32-bit local bus devices Deferred reads, deferred writes, read ahead, posted writes, programmable read prefetch counter Control s I2O r1.5 messaging unit s Eight mailbox and two doorbell registers s PCI arbiter supports 7 external masters s Host mode reset/interrupt signal configuration s PCI D3COLD Power Management Event PME generation support s Serial EEPROM interface s JTAG boundary scan PCI 9056 32-bit, 66MHz PCI Bus Mastering I/O Accelerator for Motorola PowerQUICC and Generic 32-bit, 66MHz Local Bus Designs Highest Performance 32-bit PCI Bus Mastering I/O Accelerator for Your Embedded Applications The PCI 9056 offers flexible connectivity and high performance I/O acceleration features to enable leading edge PCI, CompactPCI, and embedded host designs. MPC 850/860 PowerQUICC Designs The PCI 9056 is the perfect match for the industry leading 32-bit communications processor, the Motorola MPC 850/860 PowerQUICC. The PCI 9056 provides a direct connection to PowerQUICC devices, enabling high-speed 32-bit, 66MHz PCI performance utilizing PLX’s Data Pipe Architecture technology. Generic 32-bit, 66MHz Local Bus Designs The PCI 9056 provides direct connection to two generic industry standard interconnect buses. Designers use these 32-bit, 66MHz buses for a myriad of high-speed devices ranging from processors, to DSPs, to memories, to custom ASICs and FPGAs. The PCI 9056 Data Pipe Architecture technology enables high-speed, 32-bit, 66MHz PCI I/O with those devices. Move Your 32-bit Embedded Designs Up to 66MHz Operation As PCI evolves to meet the ever increasing I/O demands of leading edge communications systems, PLX continues to provide high performance PCI I/O acceleration solutions. Based on the architecture of the industry-leading PCI 9054, the PCI 9056 offers a variety of enhancements for the needs of today’s telecom, networking, and I/O adapter designs s 32-bit, 66MHz PCI operation s 32-bit, 66MHz local bus operation s Dynamic DMA descriptor ring management with Valid bit semaphore control s PICMG r2.0 Hot Swap Silicon, including Bias Voltage, Early Power, and Initialy Not Responding Support s PCI Power Management r1.1 D3COLD Power Management Event PME generation s PCI arbiter supporting 7 external masters s Reset and interrupt pins configurable for embedded host applications s JTAG boundary scan The PCI 9056 is register compatible with the PCI 9054, enabling easy software migration. PCI 9056 Features The PCI 9056 32-bit, 66MHz PCI I/O accelerator is the most advanced, 32-bit general-purpose bus mastering device available for Motorola MPC 850/860 PowerQUICC and generic 32-bit, 66MHz local bus based designs. The PCI 9056 incorporates PLX’s industry leading Data Pipe Architecture technology, featuring DMA engines, programmable Direct Master and Direct Slave data transfer modes, and PCI messaging functions. Interfaces PCI s 32-bit, 66MHz r2.2 operation Zero wait state bursts to 264 MB/s Dual Address Cycle DAC support as a PCI bus master Vital Product Data VPD 3.3V I/O, 5V tolerant s PICMG r2.0 Hot Swap Silicon Programming Interface 0 PI=0 Bias Voltage Support Early Power Support Intially Not Responding Support s PCI Hot Plug r1.0 s PCI Power Management r1.1 Supports D0, D1, D2, D3HOT, and D3COLD power states D3COLD Power Management Event PME generation to meet PC 2001 Windows 98/2000 communication adapter logo certification requirements Local Bus s Three local bus options on the device M Mode Motorola MPC 850/860 PowerQUICC and PowerPC 80x/82x C Mode De-multiplexed address and data buses for Intel i960 r , DSPs, custom ASICs and FPGAs, and others J Mode Multiplexed address and data buses for Intel i960, IBM PowerPC 401, IDT RC32364, DSPs, PLX IOP 480, and others s 32-bit, 66MHz operation PCI 9056 Internal Block Diagram Product Ordering Information Development Tools Support To minimize risk and lower your product development costs, PLX o ers Software Development Kits SDKs and Rapid Development Kits RDKs that support the PCI These kits enable designers to quickly bring new designs to production. PLX recognizes that software often represents the largest investment in development. The PCI 9056 is fully compliant with PLX’s SDK-LITE and SDK-PRO that enable quick and easy development of high performance local processor and host PCI software through standard APIs, I 2O messaging protocols, PCI debug tools, and sample drivers. The PCI 9056 design support is provided through RDKs that include a robust PCI development platform, complete with OrCAD schematics, documentation, a PCI 9056 chip sample, and software. PLX Technology, Inc. 870 Maude Ave. Sunnyvale, CA 94085 USA Tel 1-800-759-3735 Tel 1-408-774-9060 Fax 1-408-774-2169 Email Web Site: Product Ordering Information PCI 9056-BA66BI PCI 9056-BA66BI G 32-bit, 66 MHz PCI Bus Mastering I/O Accelerator for Motorola PowerQUICC and Generic 32-bit, 66MHz Local Bus Designs 32-bit, 66 MHz PCI Bus Mastering I/O Accelerator for Motorola PowerQUICC and Generic 32-bit, 66MHz Local Bus Designs Lead-Free CompactPCI 9056RDK-860 CompactPCI 9056 Rapid Development Kit with Motorola MPC860 PowerQUICC CPU and communications channels PCI 9056RDK-LITE PCI 9056 Rapid Development Kit with prototyping area for C, J, & M mode Local Bus designs SDK-LITE Windows Host-Side Software Development Kit for PLX I/O Accelerators and I/O Processors SDK-PRO Windows Host-Side and Local-Side Software Development Kit for PLX I/O Accelerators and I/O Processors Please visit the PLX Web site at or contact PLX sales at 408-774-9060 for pricing and samples. 2002 by PLX Technology, Inc. All rights reserved. PLX and Data Pipe Architecture are trademarks of PLX Technology, Inc. All oth er product names that appear in this material are for identi cation purposes only and are acknowledged to be trademarks or registered trademarks of their respective companies. Information supplied by PLX is believed to be accurate and r eliable, but PLX Technology, Inc. assumes no responsibility for any errors that may appear in this material. PLX Technology, Inc. reserves the right, without notice, to make changes in product design or speci cation. 9056-SIL-PB-P2-1.0 2/02 1.5K

PDF Datasheet Preview

VERSION 2002

Connectivity s 32-bit, 66MHz PCI r2.2 compliant s Motorola PowerQUICC and
generic 32-bit, 66MHz local bus modes s 3.3V I/O, 5V tolerant bus interfaces s PICMG r2.0 Hot Swap Silicon s 256-ball, 17 x 17 mm, mm fine pitch PBGA FPBGA

Performance s Zero wait state burst operation PCI bus bursts to 264 MB/sec Local bus bursts to 264 MB/sec s 2 DMA Channels Block & Scatter/Gather transfers DMA descriptor ring management Demand Mode & EOT H/W
controls s Direct Master data transfers Generate any PCI transaction Read ahead and programmable
read prefetch counter s Direct Slave data transfers Access 8-, 16-, and 32-bit local
bus devices Deferred reads, deferred writes,
read ahead, posted writes, programmable read prefetch counter

Control s I2O r1.5 messaging unit s Eight mailbox and two
doorbell registers s PCI arbiter supports 7 external
masters s Host mode reset/interrupt signal
configuration s PCI D3COLD Power Management

Event PME generation support s Serial EEPROM interface s JTAG boundary scan

PCI 9056
32-bit, 66MHz PCI Bus Mastering I/O Accelerator for Motorola PowerQUICC and Generic 32-bit, 66MHz Local Bus Designs

Highest Performance 32-bit PCI Bus Mastering I/O Accelerator for Your Embedded Applications The PCI 9056 offers flexible connectivity and high performance I/O acceleration features to enable leading edge PCI, CompactPCI, and embedded host designs. MPC 850/860 PowerQUICC Designs The PCI 9056 is the perfect match for the industry leading 32-bit communications processor, the Motorola MPC 850/860 PowerQUICC. The PCI 9056 provides a direct connection to PowerQUICC devices, enabling high-speed 32-bit, 66MHz PCI performance utilizing PLX’s Data Pipe Architecture technology. Generic 32-bit, 66MHz Local Bus Designs The PCI 9056 provides direct connection to two generic industry standard interconnect buses. Designers use these 32-bit, 66MHz buses for a myriad of high-speed devices ranging from processors, to DSPs, to memories, to custom ASICs and FPGAs. The PCI 9056 Data Pipe Architecture technology enables high-speed, 32-bit, 66MHz PCI I/O with those devices.

Move Your 32-bit Embedded Designs Up to 66MHz Operation As PCI evolves to meet the ever increasing I/O demands of leading edge communications systems, PLX continues to provide high performance PCI I/O acceleration solutions. Based on the architecture of the industry-leading PCI 9054, the PCI 9056 offers a variety of enhancements for the needs of today’s telecom, networking, and I/O adapter designs s 32-bit, 66MHz PCI operation s 32-bit, 66MHz local bus operation s Dynamic DMA descriptor ring management with Valid bit semaphore control s PICMG r2.0 Hot Swap Silicon, including Bias Voltage, Early Power,
and Initialy Not Responding Support s PCI Power Management r1.1 D3COLD Power Management Event PME generation s PCI arbiter supporting 7 external masters s Reset and interrupt pins configurable for embedded host applications s JTAG boundary scan

The PCI 9056 is register compatible with the PCI 9054, enabling easy software migration.

PCI 9056 Features

The PCI 9056 32-bit, 66MHz PCI I/O accelerator is the most advanced, 32-bit general-purpose bus mastering device available for Motorola MPC 850/860 PowerQUICC and generic 32-bit, 66MHz local bus based designs. The PCI 9056 incorporates PLX’s industry leading Data Pipe Architecture technology, featuring DMA engines, programmable Direct Master and Direct Slave data transfer modes, and PCI messaging functions.

Interfaces

PCI s 32-bit, 66MHz r2.2 operation

Zero wait state bursts to 264 MB/s

Dual Address Cycle DAC support as a PCI bus master

Vital Product Data VPD
3.3V I/O, 5V tolerant
s PICMG r2.0 Hot Swap Silicon

Programming Interface 0 PI=0

Bias Voltage Support

Early Power Support

Intially Not Responding Support
s PCI Hot Plug r1.0
s PCI Power Management r1.1

Supports D0, D1, D2, D3HOT, and D3COLD power states

D3COLD Power Management Event PME generation to meet PC 2001 Windows 98/2000 communication adapter logo certification requirements

Local Bus s Three local bus options on the device

M Mode Motorola MPC 850/860 PowerQUICC and PowerPC 80x/82x

C Mode De-multiplexed address and data buses for Intel i960 r , DSPs, custom ASICs and FPGAs, and others

J Mode Multiplexed address and data buses for Intel i960, IBM PowerPC 401, IDT RC32364, DSPs, PLX IOP 480, and others
s 32-bit, 66MHz operation
PCI 9056 Internal Block Diagram Product Ordering Information

Development Tools Support

To minimize risk and lower your product development costs, PLX o ers Software Development Kits SDKs and Rapid Development Kits RDKs that support the PCI These kits enable designers to quickly bring new designs to production.

PLX recognizes that software often represents the largest investment in development. The PCI 9056 is fully compliant with PLX’s SDK-LITE and SDK-PRO that enable quick and easy development of high performance local processor and host PCI software through standard APIs, I 2O messaging protocols, PCI debug tools, and sample drivers.

The PCI 9056 design support is provided through RDKs that include a robust PCI development platform, complete with OrCAD schematics, documentation, a PCI 9056 chip sample, and software.

PLX Technology, Inc. 870 Maude Ave. Sunnyvale, CA 94085 USA Tel 1-800-759-3735 Tel 1-408-774-9060 Fax 1-408-774-2169 Email Web Site:
Product Ordering Information

PCI 9056-BA66BI PCI 9056-BA66BI G
32-bit, 66 MHz PCI Bus Mastering I/O Accelerator for Motorola PowerQUICC and Generic 32-bit, 66MHz Local Bus Designs
32-bit, 66 MHz PCI Bus Mastering I/O Accelerator for Motorola PowerQUICC and Generic 32-bit, 66MHz Local Bus Designs Lead-Free

CompactPCI 9056RDK-860

CompactPCI 9056 Rapid Development Kit with Motorola MPC860 PowerQUICC CPU and communications channels

PCI 9056RDK-LITE

PCI 9056 Rapid Development Kit with prototyping area for C, J, & M mode Local Bus designs

SDK-LITE

Windows Host-Side Software Development Kit for PLX I/O Accelerators and I/O Processors

SDK-PRO

Windows Host-Side and Local-Side Software Development Kit for PLX I/O Accelerators and I/O Processors

Please visit the PLX Web site at or contact PLX sales at 408-774-9060 for pricing and samples.
2002 by PLX Technology, Inc. All rights reserved. PLX and Data Pipe Architecture are trademarks of PLX Technology, Inc. All oth
er product names that appear in this material are for identi cation purposes only and are acknowledged to be
trademarks or registered trademarks of their respective companies. Information supplied by PLX is believed to be accurate and r eliable, but PLX Technology, Inc. assumes no responsibility for any errors that may appear in this material. PLX

Technology, Inc. reserves the right, without notice, to make changes in product design or speci cation.
9056-SIL-PB-P2-1.0
2/02 1.5K

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived PCI9056RDK-LITE Datasheet file may be downloaded here without warranties.

Datasheet ID: PCI9056RDK-LITE 520494