BCM53003B0KPBG

BCM53003B0KPBG Datasheet

BCM53001/BCM53003

Part	Datasheet
BCM53003B0KPBG	BCM53003B0KPBG (pdf)

Related Parts	Information
BCM53003B0KPB	BCM53003B0KPB

PDF Datasheet Preview
BCM53001/BCM53003 Brief OPTIMIZED COMMUNICATIONS PROCESSOR WITH NETWORK ACCELERATION SUMMARY OF BENEFITS • Latest 74K Core • Dual-issue machine with out-of-order execution • 32-KB I-cache, 32-KB D-cache • Supports DSP ASE v2.0 • BCM53001 400 MHz 800 DMIPS • BCM53003 600 MHz 1200 DMIPS • On-chip Network Acceleration • Supports L2/L3/L4 packet classification • ContentAware processing based on TCAM technology • Traffic Quality of Service QoS assignment • Integrated SoC RAM • 512 KB • Dual Gigabit Ethernet Media Access Control MAC • 1-GMAC SGMII • 1-GMAC MII/RGMII • DDR2 Memory Controller • 200 MHz 333 MHz 16 or 32 bits • Maximum memory size 1 GB • On-chip PHY • Dual PCI Interface • Each interface supports x1 lane • Compliant with PCI Express base specification v1.1 • On-chip SerDes • Single USB Host Port with on-chip PHY • Flash Memory • Support for both Serial Flash up to 32 MB and Parallel Flash up to 256 MB • Both NOR and NAND types • TDM Interface • Support for up to two full-duplex VoIP channels • Additional Peripheral Interfaces • UART, I2C, SPI, MDIO, JTAG, GPIO • 65 nm LP process • Industry-leading Price/Performance • Powered by superscalar MIPS74K CPU core running at 600 MHz • Latest high-speed interfaces such as PCIe , dual GMACs, and DDR2 • Low-cost benefits of 65 nm LP process technology • Optimized Mix of CPU Performance and Peripherals • Allows high CPU utilization due to balance of interconnect, I/O, and memory bandwidth with CPU performance • On-chip packet processing allows for significant processing throughput available for other control plane tasks • Point-to-point interconnect fabric AXI provides highbandwidth and low-latency for on-chip processing requirements • Complete Solutions for Targeted Applications • Switch Control and Management, Metro Ethernet Customer Premises Equipment CPE , Enterprise Access Point • Total hardware solution with Broadcom SMB and Enterprise switches ROBO and XGS and PHYs • Broadcom and SmartPATH management software provides fast time-to-market for Enterprise and SMB switches, Metro Ethernet CPE, and Enterprise Access Point applications • Evaluation/development boards available for target applications • Cost-Effective and Power-Efficient • Highly integrated device requiring fewer external components • Flash memory with support for both NOR and NAND types • DDR2 memory interface to connect to commodity memory • Produced in low power 65 nm LP process technology 16b/32b OVERVIEW DDR2 PHY DDR2 Memory Controller MIPS32 Core EJTAG 600 MHz Gbps I-Cache D-Cache 32 KB 32 KB SerDes SOCRAM 512 KB PCIe 1x1 PCIe 1x1 Peripheral Interface GPIO Serial Parallel SPI Flash 8b/16b I2C UART/ UART I2C 480 Mbps USB PHY USB Host RGMII or MII SGMII/ SerDes GMAC SerDes GMAC Packet Processing

PDF Datasheet Preview

BCM53001/BCM53003

Brief

OPTIMIZED COMMUNICATIONS PROCESSOR WITH NETWORK ACCELERATION

SUMMARY OF BENEFITS
• Latest 74K Core
• Dual-issue machine with out-of-order execution
• 32-KB I-cache, 32-KB D-cache
• Supports DSP ASE v2.0
• BCM53001 400 MHz 800 DMIPS
• BCM53003 600 MHz 1200 DMIPS
• On-chip Network Acceleration
• Supports L2/L3/L4 packet classification
• ContentAware processing based on TCAM technology
• Traffic Quality of Service QoS assignment
• Integrated SoC RAM
• 512 KB
• Dual Gigabit Ethernet Media Access Control MAC
• 1-GMAC SGMII
• 1-GMAC MII/RGMII
• DDR2 Memory Controller
• 200 MHz 333 MHz 16 or 32 bits
• Maximum memory size 1 GB
• On-chip PHY
• Dual PCI Interface
• Each interface supports x1 lane
• Compliant with PCI Express base specification v1.1
• On-chip SerDes
• Single USB Host Port with on-chip PHY
• Flash Memory
• Support for both Serial Flash up to 32 MB and Parallel Flash up to 256 MB
• Both NOR and NAND types
• TDM Interface
• Support for up to two full-duplex VoIP channels
• Additional Peripheral Interfaces
• UART, I2C, SPI, MDIO, JTAG, GPIO
• 65 nm LP process
• Industry-leading Price/Performance
• Powered by superscalar MIPS74K CPU core running at 600 MHz
• Latest high-speed interfaces such as PCIe , dual GMACs, and DDR2
• Low-cost benefits of 65 nm LP process technology
• Optimized Mix of CPU Performance and Peripherals
• Allows high CPU utilization due to balance of interconnect, I/O, and memory bandwidth with CPU performance
• On-chip packet processing allows for significant processing throughput available for other control plane tasks
• Point-to-point interconnect fabric AXI provides highbandwidth and low-latency for on-chip processing requirements
• Complete Solutions for Targeted Applications
• Switch Control and Management, Metro Ethernet Customer Premises Equipment CPE , Enterprise Access Point
• Total hardware solution with Broadcom SMB and Enterprise switches ROBO and XGS and PHYs
• Broadcom and SmartPATH management software provides fast time-to-market for Enterprise and SMB switches, Metro Ethernet CPE, and Enterprise Access Point applications
• Evaluation/development boards available for target applications
• Cost-Effective and Power-Efficient
• Highly integrated device requiring fewer external components
• Flash memory with support for both NOR and NAND types
• DDR2 memory interface to connect to commodity memory
• Produced in low power 65 nm LP process technology
16b/32b

OVERVIEW

DDR2 PHY DDR2 Memory Controller

MIPS32 Core EJTAG
600 MHz

Gbps

I-Cache D-Cache 32 KB 32 KB

SerDes

SOCRAM 512 KB

PCIe 1x1

PCIe 1x1

Peripheral Interface

GPIO Serial Parallel SPI Flash 8b/16b

I2C UART/ UART I2C
480 Mbps

USB PHY

USB Host

RGMII or MII

SGMII/ SerDes

GMAC

SerDes GMAC

Packet Processing

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Datasheet ID: BCM53003B0KPBG 519849