ATP AW24M7228BLK0MW
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AW24M7228BLK0MW (pdf) |
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Electronics, Inc. 2590 North First Street, San Jose, CA 95131, U.S.A. Tel 408-732-5000 Fax 408-732-5055 ATP AW24M7228BLK0MW 8GB DDR3-1600 Wide Temperature UNBUFFERED ECC SODIMM DESCRIPTION The ATP AW24M7228BLK0MW is a high performance 8GB DDR3-1600 Industrial Grade Unbuffered ECC SODIMM SDRAM memory module. It is organized as 1024M x 72 in a 204-pin Small Outline Dual-In-Line Memory Module SODIMM package. The module utilizes eighteen 512Mx8 DDR3 SDRAMs in FBGA package. The module consists of a 256-byte serial EEPROM, which contains the module configuration information. KEY FEATURES • Operation Temperature TA -40°C ~ +85°C • High Density 8GB 1024M x 72 • DIMM Rank 2 Ranks • Cycle Time 1.25ns 800MHz • CAS Latency 11 • Power supply 1.5V ± 0.075V • Internal self calibration through ZQ • Burst lengths 8 • Auto & Self refresh • Asynchronous Reset • refresh interval at lower than TCASE 85°C, refresh interval at 85°C < TCASE < 95 °C • Dynamic On Die Termination • Fly-by topology • PCB Height inches • RoHS compliant Part No. AW24M7228BLK0MW Max Freq 800MHz x2 Interface SSTL_15 PIN DESCRIPTION Pin Name A0~A9, A11~A15 A10/AP BA0~BA2 Address Inputs Address Input/Auto precharge SDRAM Bank Address CAS CK0~CK1 CK0 ~ CK1 CKE0,CKE1 DM0~DM8 DQ0~DQ63 DQS0~DQS8 Column Address Strobe Clock Inputs, positive line Clock Inputs, negative line Clock Enables Data Masks Data Input/Output Data strobes DQS0 ~ DQS8 VREFDQ REFCA A12/ BC VTT CB0~CB7 Data strobes, negative line Input/Output Reference Address Input/Burst chop Termination voltage DIMM ECC Check bits Your Ultimate Memory Solution! Pin Name ODT0,ODT1 RAS CS0 , CS1 SA0~SA1 SCL SDA VDD VDDSPD VSS RESET WE TEST Event On die termination Row Address Strobe Chip Selects SPD address Serial Presence Detect SPD Clock Input SPD Data Input/Output Core Power SPD Power Ground This signal resets the DDR3 SDRAM Write Enable Logic Analyzer specific test pin Temperature Sensor Event Output No Connect Page 1 of 7 |
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