EVAL-ADV7511W-AKZ

EVAL-ADV7511W-AKZ Datasheet


Part Datasheet
EVAL-ADV7511W-AKZ EVAL-ADV7511W-AKZ EVAL-ADV7511W-AKZ (pdf)
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EVAL-ADV7511W-ABZ EVAL-ADV7511W-ABZ EVAL-ADV7511W-ABZ
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ADV7511W

Low-Power HDMI 1.4a Transmitter

HARDWARE USER’S GUIDE

Page 1 of 45

ADV7511W

Initial Release
4/11

Change Description Corrected register bit information for the “Input ID” bits Corrected Mux select bit table

Page 2 of 45

ADV7511W

TABLE OF CONTENTS

Section 1 Introduction Scope and Links Symbols Format Overview Hardware Supported Input Formats Supported Output Formats 8

Section 2 Reference Documents ADI Documents Industry

Section 3 Block diagram Section 4:

Explanation of Test ESD Caution Section 5 Pin and package Mechanical Drawings and Outline Dimensions Section 6 Functional Input

Unused Video Data Capture

Video Input Connections Audio Data Capture Block

Supported Audio Input Format and Inter-IC Sound I2S Audio Sony/Philips Digital Interface S/PDIF HBR Hot Plug Detect HPD Power Down / I2C Address PD/AD Input Voltage Tolerance Output Formats Supported TMDS ESD EMI Display Data Channel DDC Interrupt Output INT PLL Consumer Electronic Control CEC Unused CEC Video Data Formatting Supported 3D DE, Hsync and Vsync Color Space Conversion CSC

Page 3 of 45

ADV7511W
4:2:2 to 4:4:4 and 4:4:4 to 4:2:2 Conversion DDC Controller Inter-IC Communications I2C

Two-Wire Serial Control Port 36 Data Transfer via Serial Interface Read/Write Examples 38 Power Supply Sequencing 40 Power Consumption Section 7 PCB Layout Recommendations Power Supply Video Clock and Data Audio Clock and Data Inputs 42 SDA and DDCSDA and DDCSCL Current Reference Pin CEC Implementation Section 8 Glossary 45

Page 4 of 45

ADV7511W

TABLE OF FIGURES

Figure 1 ADV7511W Functional Block Figure 2 Timing for Video Data Interface Figure 3 Timing for I2S Audio Interface Figure 4 Timing for S/PDIF Audio Interface Figure 5 64-lead LQFP configuration top view - not to scale Figure 6 64-lead Low-Profile Quad Flat Pack [LQFP-SW64-2] Figure 7 2X Clock timing Figure 8 DDR DE timing - Register 0x16[1] = Figure 9 DDR DE timing - Register 0x16[1] = Figure 10 I2S Standard Audio Data width 16 to 24 bits per Figure 11 I2S Standard Audio 16-bit samples Figure 12 Serial Audio Right-Justified Figure 13 Serial Audio Left-Justified Figure 14 AES3 Direct Audio Figure 15 S/PDIF Data Figure 16 Typical All-HDMI Home Figure 17 Sync Processing Block Diagram Figure 18 Single Channel of CSC Figure 19 Serial Port Read/Write Timing Figure 20 Serial Byte Figure 21 Power Supply Figure 22 AVDD and PVDD Max Noise vs. Figure 23 LC Filter Transfer Figure 24 CEC external Figure 25 Example

Page 5 of 45

ADV7511W

TABLE OF TABLES

Table 1 Table 2 Table 3 Table 4 Table 5 Table 6 Table 7 Table 8 Table 9 Table 10 Table 11 Table 12 Table 13 Table 14 Table 15 Table 16 Table 17

Electrical Specifications Absolute Maximum Ratings 14 Complete Pinout List ADV7511W Input ID Selection 20 Normal RGB or YCbCr 4:4:4 24 bits with Separate Syncs Input ID = YCbCr 4:2:2 Formats 24, 20, or 16 bits Input Data Mapping 0x48[4:3]=‘00’ evenly distributed Input ID=1 or 2 YCbCr 4:2:2 Formats 12, 10, or 8 bits Input Data Mapping 0x48[4:3]=‘00’ evenly distributed Input ID = 3,4,7,8 YCbCr 4:2:2 8 bits DDR with Separate Syncs Input ID = 6, right justified R0x48[4:3] = YCbCr 4:2:2 8 bits DDR with Separate Syncs Input ID = 6, left justified R0x48[4:3] =

YCbCr 4:2:2 12, 10, 8 bits DDR with Separate Syncs:Input ID = 6, evenly distributed R0x48[4:3] = Audio input format SCLK Duty Cycle Some useful “End-User” CEC Features 33 Supported 3D Channel Assignment for Color Space Converter Serial Port Maximum Power Consumption by Circuit note these values will change after

Page 6 of 45

ADV7511W

SECTION 1 INTRODUCTION

Scope and Organization

This document is intended to help the hardware designer understand what is necessary to design for the ADV7511W and maintain the highest levels of performance. The ADV7511W Hardware User's Guide HUG provides guidelines to design the schematics and board layout. Included are sections on the 64-lead LQFP package and an overview of the functional blocks including a brief description for each block to provide an understanding of the ADV7511W functional and performance capabilities. The ADV7511 Programming Guide PG is available as a separate document and should be used to gain a complete understanding on how to configure the ADV7511W within a system application. It is divided into the following sections:

Section 2 Reference Documents is a list of other references, which will be helpful when designing with the ADV7511W HDMI Transmitter.

Section 3 Block Diagram gives an overall functional view of the HDMI transmitter. Section 4:Specifications give all pertinent data such as timing, power and testing. Section 5:Pin and Package Information give the mechanical details of the interface. Section 6:Functional Description serves to elaborate on input, output and internal operations. Section 7 PCB Layout Recommendations are an aid to low noise operation.

Links

There are many links in this document to help with navigation. Use a mouse click to follow a link, and use the Alt key + left arrow key to return. Active links can be identified by the dotted blue underline.
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Datasheet ID: EVAL-ADV7511W-AKZ 517879