Low Capacitance, Low Charge Injection, ±15 V/+12 V iCMOS SPST in SOT-23 ADG1201/ADG1202
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ADG1202BRJZ-R2 (pdf) |
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Low Capacitance, Low Charge Injection, ±15 V/+12 V iCMOS SPST in SOT-23 ADG1201/ADG1202 pF off capacitance <1 pC charge injection Low leakage nA maximum 85°C 120 Ω on resistance Fully specified at ±15 V, +12 V No VL supply required 3 V logic-compatible inputs Rail-to-rail operation 6-lead SOT-23 package Automatic test equipment Data acquisition systems Battery-powered systems Sample-and-hold systems Audio signal routing Video signal routing Communication systems The ADG1201/ADG1202 are monolithic complementary metal-oxide semiconductor CMOS devices containing an SPST switch designed in an industrial CMOS process. iCMOS is a modular manufacturing process combining high voltage CMOS and bipolar technologies. It enables the development of a wide range of high performance analog ICs capable of 33 V operation in a footprint that no previous generation of high voltage parts has been able to achieve. Unlike analog ICs using conventional CMOS processes, iCMOS components can tolerate high supply voltages while providing increased performance, dramatically lower power consumption, and reduced package size. The ultralow capacitance and charge injection of these switches make them ideal solutions for data acquisition and sample-and-hold applications, where low glitch and fast settling are required. Fast switching speed coupled with high signal bandwidth make the parts suitable for video signal switching. FUNCTIONAL BLOCK DIAGRAM ADG1201 ADG1202 06576-001 SWITCHES SHOWN FOR A LOGIC “1” INPUT Figure iCMOS construction ensures ultralow power dissipation, making the parts ideally suited for portable and batterypowered instruments. The ADG1201/ADG1202 contain a single-pole/single-throw SPST switch. Figure 1 shows that with a logic input of 1, the switch of the ADG1201 is closed and that of the ADG1202 is open. Each switch conducts equally well in both directions when on and has an input signal range that extends to the supplies. In the off condition, signal levels up to the supplies are blocked. PRODUCT HIGHLIGHTS Ultralow capacitance. <1 pC charge injection. Ultralow leakage. 3 V logic-compatible digital inputs VIH = V, VIL = V. No VL logic power supply required. SOT-23 package. Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: Fax: 2008 Analog Devices, Inc. All rights reserved. ADG1201/ADG1202 TABLE OF CONTENTS Dual Supply 3 Single Supply 4 0 Initial Version Absolute Maximum Ratings ESD Pin Configuration and Function Typical Performance Characteristics Test 10 Terminology 12 Outline Dimensions 13 Ordering Guide 13 ADG1201/ADG1202 SPECIFICATIONS DUAL SUPPLY VDD = 15 V ± 10%, VSS = −15 V ± 10%, GND = 0 V, unless otherwise noted. Table Parameter ANALOG SWITCH Analog Signal Range On Resistance RON On Resistance Flatness RFLAT ON LEAKAGE CURRENTS Source Off Leakage, IS Off Drain Off Leakage, ID Off Channel On Leakage, ID, IS On DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current, IINL or IINH 25°C 120 200 20 60 Digital Input Capacitance, CIN DYNAMIC CHARACTERISTICS2 tOFF Charge Injection Off Isolation Total Harmonic Distortion + Noise −3 dB Bandwidth CS Off CD Off CD, CS On POWER REQUIREMENTS IDD 140 170 90 105 80 660 3 VDD/VSS B Version1 −40°C to −40°C to +85°C +125°C VDD to VSS ±5 to 1 Temperature range for B version is −40°C to +125°C. 2 Guaranteed by design, not subject to production test. Unit Test Conditions/Comments V Ω typ Ω max Ω typ Ω max nA typ nA max nA typ nA max nA typ nA max VDD = V, VSS = V VS = ±10 V, IS = −1 mA see Figure 20 VS = −5 V, 0 V, and +5 V IS = −1 mA VDD = V, VSS = V VS = ±10 V, VD = ±10 V see Figure 21 VS = ±10 V, VD = ±10 V see Figure 21 VS = VD = ±10 V see Figure 22 V min V max uA typ uA max pF typ VIN = VINL or VINH ORDERING GUIDE Model ADG1201BRJZ-R21 ADG1201BRJZ-REEL71 ADG1202BRJZ-R21 ADG1202BRJZ-REEL71 Temperature Range −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C 1 Z = RoHS Compliant Part. Package Description 6-Lead Small Outline Transistor Package [SOT-23] 6-Lead Small Outline Transistor Package [SOT-23] 6-Lead Small Outline Transistor Package [SOT-23] 6-Lead Small Outline Transistor Package [SOT-23] Package Option RJ-6 RJ-6 RJ-6 RJ-6 Branding S25 S26 ADG1201/ADG1202 NOTES NOTES ADG1201/ADG1202 ADG1201/ADG1202 NOTES 2008 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D06576-0-2/08 0 |
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