EVALUATING THE AD9680 ANALOG-TO-DIGITAL CONVERTER
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One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106 • Tel • Fax • EVALUATING THE AD9680 ANALOG-TO-DIGITAL CONVERTER This user guide describes the AD9680 evaluation board AD9680-1000EBZ which provides all of the support circuitry required to operate the ADC in its various modes and configurations. The application software used to interface with the devices is also described. The AD9680 data sheet provides additional information and should be consulted when using the evaluation board. All documents and software tools are available at For additional information or questions, send an email to AD9680-1000EBZ Typical Measurement Setup Figure Evaluation Board on Left and ADS7-V1EBZ on Right q Full featured evaluation board for the AD9680 q SPI interface for setup and control q Wide band Balun driven input q No external supply needed. Uses 12V-1A and 3.3V-3A supplies from FMC q and SPI controller software interfaces Helpful Documents q AD9680 Data Sheet q ADS7-V1EBZ evaluation kit ADS7-V1EBZ q AN-905 Application Note, VisualAnalog Converter Evaluation Tool Version User Manual q AN-878 Application Note, High Speed ADC SPI Control Software q ADI SPI Application Note ADI Serial Control Interface Standard q AN-835 Application Note, Understanding ADC Testing and Evaluation Software Needed q VisualAnalog q SPIController Design and Integration Files q FPGA BIN file am.bin Equipment Needed q Analog signal source and antialiasing filter q Sample clock source q 12V, 6.5A switching power supply such as the SL POWER CENB1080A1251F01 supplied with ADS7-V1EBZ q PC running q USB port q AD9680-1000EBZ board q ADS7-V1EBZ FPGA-based data capture kit Getting Started This section provides quick start procedures for using the AD9680-1000EBZ board. Configuring the Board Before using the software for testing, configure the evaluation board as follows Connect the AD9680-1000EBZ evaluation board to the ADS7-V1EBZ data capture board, as shown in Figure Connect one 12V, 6.5A switching power supply such as the CENB1080A1251F01 supplied to P4 on the supplied USB cable. Turn on the ADS7-V1EBZ. The ADS7-V1EBZ will appear in the Device Manager as shown in Figure Figure Device Manager showing ADS7-V1EBZ If the Device Manager does not show the ADS7-V1EBZ listed as shown in Figure 2, unplug all USB devices from the PC, uninstall and re-install SPIController and VisualAnalog and restart the hardware setup from step On the ADC evaluation board, provide a clean, low jitter 1GHz clock source to connector J801 and set the amplitude to 14dBm. This is the ADC Sample Clock. On the ADC evaluation board, provide a clean, low jitter clock source to connector J804 and set the amplitude to 10dBm. This is the Reference Clock for the gigabit transceivers in the FPGA. The REFCLK frequency can be calculated using the following empirical formulae: bps/lane, where Default Nprime = 16 On the ADC evaluation board, use a clean signal generator with low phase noise to provide an input signal for channel A to P200. Use a shielded, RG-58, 50 coaxial cable to connect the signal generator output to the ADC Evaluation Board. For best results, use a narrow-band, band-pass filter with 50 terminations and an appropriate center frequency. ADI uses TTE, Allen Avionics, and K & L band-pass filters. On the ADC evaluation board, use a clean signal generator with low phase noise to provide an input signal for channel B to P202. Use a shielded, RG-58, 50 coaxial cable to connect the signal generator output to the ADC Evaluation Board. For best results, use a narrow-band, band-pass filter with 50 terminations and an appropriate center frequency. ADI uses TTE, Allen Avionics, and K & L band-pass filters. Visual Analog Setup Click Start All Programs Analog Devices VisualAnalog On the VisualAnalog “New Canvas” window, click ADC Dual AD9680 Selecting the AD9680 canvas Figure If VisualAnalog opens with a collapsed view, click on the “Expand Display” icon see figure 5 Figure Expanding Display in VA Click the Settings button in the ADC Data Capture block as shown in Figure 6 Figure Changing the ADC Capture Settings On the General tab make sure the clock frequency is set to 1000MHz or other clock frequency . The FFT capture length may be changed to 131072 128k or 262144 256k per channel. The ADs7-V1 FPGA software supports up to 2M FFT capture 1M per channel Figure Setting the clock frequency and Capture length Click on the Capture Board tab and browse to the ad9680_ads7v1_09242013_0949am.bin file. Click the Program button. The FPGA_DONE LED should illuminate on the ADS7-V1 board indicating that the FPGA has been correctly programmed. The bin file is available at the site 9am.bin On the Device tab. Make sure that Enable Alternate REFCLK option is unchecked. Click OK SPIController Setup Click Start All Programs Analog Devices SPIController Select the AD9680_14Bit_1.25GSspiR03.cfg if prompted. In the Global tab, under the Generic Read/Write section, write 0x81 to register 0x000. This |
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