AD7937BR

AD7937BR Datasheet

AD7937

Part	Datasheet
AD7937BR	AD7937BR (pdf)

Related Parts	Information
AD7937AR-REEL	AD7937AR-REEL
AD7937AR	AD7937AR
AD7937BR-REEL7	AD7937BR-REEL7
AD7937BR-REEL	AD7937BR-REEL
AD7937BRZ	AD7937BRZ

PDF Datasheet Preview
LC2MOS 8+4 Loading Dual 12-Bit DAC AD7937 FEATURES Two 12-Bit DACs in One Package DAC Ladder Resistance Matching Surface-Mount Package 4-Quadrant Multiplication Low Gain Error 3 LSB max Over Temperature Byte Loading Structure Fast Interface Timing APPLICATIONS Automatic Test Equipment Programmable Filters Audio Applications Synchro Applications Process Control GENERAL DESCRIPTION The AD7937 contains two 12-bit current output DACs on one monolithic chip. A separate reference input is provided for each DAC. The dual DAC saves valuable board space, and the monolithic construction ensures excellent thermal tracking. Both DACs are guaranteed 12-bit monotonic over the full temperature range. The AD7937 has a 2-byte eight LSBs, four MSBs loading structure. It is designed for right-justified data format. The control signals for register loading are A0, A1, CS, WR, and UPD. Data is loaded to the input registers when CS and WR are low. To transfer this data to the DAC registers, UPD must be taken low with WR. Added features on the AD7937 include an asynchronous CLR line which is very useful in calibration routines. When this is taken low, all registers are cleared. The double buffering of the data inputs allows simultaneous update of both DACs. Also, each DAC has a separate AGND line. This increases the device versatility for instance, one DAC may be operated with AGND biased while the other is connected in the standard configuration. The AD7937 is manufactured using the Linear Compatible CMOS LC2MOS process. It is speed compatible with most microprocessors and accepts TTL, 74HC, and 5 V CMOS logic level inputs. FUNCTIONAL BLOCK DIAGRAM AD7937 UPD A1 A0 CS WR CONTROL LOGIC DAC A MS INPUT REG DAC A LS INPUT REG DAC A REGISTER 12 DAC A DAC B DAC B REGISTER DAC B MS INPUT REG DAC B LS INPUT REG IOUTA AGNDA RFBA VREFA VREFB RFBB IOUTB AGNDB DGND PRODUCT HIGHLIGHTS DAC-to-DAC Matching Since both DACs are fabricated on the same chip, precise matching and tracking is inherent. Many applications that are not practical using two discrete DACs are now possible. Typical matching: Small Package Size The AD7937 is packaged in a small 24-lead SOIC. Wide Power Supply Tolerance The device operates on a 5 V VDD, with ± 10% tolerance on this nominal figure. All specifications are guaranteed over this range. Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel 781/329-4700 World Wide Web Site: Fax 781/326-8703 Analog Devices, Inc., 2000 VDD = 5 V 10%, VREFA = VREFB = 10 V IOUTA = AGNDA = 0 V, IOUTB = AGNDB = 0 V. All specifications TMIN to TMAX unless otherwise noted. Parameter ACCURACY Resolution Relative Accuracy Differential Nonlinearity Gain Error Gain Temperature Coefficient2 Output Leakage Current IOUTA IOUTB REFERENCE INPUT Resistance VREFA, VREFB Input Resistance Match DIGITAL INPUTS VIH Input High Voltage VIL Input Low Voltage IIN Input Current +25°C TMIN to TMAX CIN Input Capacitance 2 POWER SUPPLY VDD IDD A Version ORDERING GUIDE Relative Accuracy ± 1 LSB ± 1/2 LSB Gain Error ± 6 LSB ± 3 LSB Package Description Small Outline Small Outline Option R-24 R-24 CAUTION ESD electrostatic discharge sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD7937 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. WARNING! ESD SENSITIVE DEVICE AD7937 PIN FUNCTION DESCRIPTIONS 1 2 3 4 5 13, 14 12 15 16 17 Mnemonic AGNDA IOUTA RFBA VREFA CS DGND A0 A1 CLR VREFB RFBB IOUTB AGNDB Analog Ground for DAC A. Current output terminal of DAC A. Feedback resistor for DAC A. Reference input to DAC A. Chip Select Input Active low. Eight data inputs, Digital Ground. Address Line Address Line Clear Input. Active low. Clears all registers. Write Input. Active low. Updates DAC Registers from inputs registers. Power supply input. Nominally 5 V to 15 V, with ± 10% tolerance. Reference input to DAC B. Feedback resistor for DAC B. Current output terminal of DAC B. Analog Ground for DAC B. PIN CONFIGURATION SOIC AGNDA 1 24 AGNDB IOUTA 2 23 IOUTB RFBA 3 22 RFBB VREFA CS DB0 DB1 21 VREFB 5 AD7937 20 VDD 6 TOP VIEW 19 UPD 7 Not to Scale 18 WR DB2 8 17 CLR DB3 9 16 A1 DB4 10 15 A0

PDF Datasheet Preview

LC2MOS 8+4 Loading Dual 12-Bit DAC

AD7937

FEATURES Two 12-Bit DACs in One Package DAC Ladder Resistance Matching Surface-Mount Package 4-Quadrant Multiplication Low Gain Error 3 LSB max Over Temperature Byte Loading Structure Fast Interface Timing

APPLICATIONS Automatic Test Equipment Programmable Filters Audio Applications Synchro Applications Process Control

GENERAL DESCRIPTION The AD7937 contains two 12-bit current output DACs on one monolithic chip. A separate reference input is provided for each DAC. The dual DAC saves valuable board space, and the monolithic construction ensures excellent thermal tracking. Both DACs are guaranteed 12-bit monotonic over the full temperature range.

The AD7937 has a 2-byte eight LSBs, four MSBs loading structure. It is designed for right-justified data format. The control signals for register loading are A0, A1, CS, WR, and UPD. Data is loaded to the input registers when CS and WR are low. To transfer this data to the DAC registers, UPD must be taken low with WR.

Added features on the AD7937 include an asynchronous CLR line which is very useful in calibration routines. When this is taken low, all registers are cleared. The double buffering of the data inputs allows simultaneous update of both DACs. Also, each DAC has a separate AGND line. This increases the device versatility for instance, one DAC may be operated with AGND biased while the other is connected in the standard configuration.

The AD7937 is manufactured using the Linear Compatible CMOS LC2MOS process. It is speed compatible with most microprocessors and accepts TTL, 74HC, and 5 V CMOS logic level inputs.

FUNCTIONAL BLOCK DIAGRAM

AD7937

UPD A1 A0 CS WR

CONTROL LOGIC

DAC A MS INPUT REG

DAC A LS INPUT REG

DAC A REGISTER 12

DAC A

DAC B

DAC B REGISTER

DAC B MS INPUT REG

DAC B LS INPUT REG

IOUTA AGNDA RFBA VREFA

VREFB RFBB IOUTB AGNDB

DGND

PRODUCT HIGHLIGHTS DAC-to-DAC Matching

Since both DACs are fabricated on the same chip, precise matching and tracking is inherent. Many applications that are not practical using two discrete DACs are now possible. Typical matching:

Small Package Size The AD7937 is packaged in a small 24-lead SOIC.

Wide Power Supply Tolerance The device operates on a 5 V VDD, with ± 10% tolerance on this nominal figure. All specifications are guaranteed over this range.

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel 781/329-4700 World Wide Web Site:

Fax 781/326-8703

Analog Devices, Inc., 2000

VDD = 5 V 10%, VREFA = VREFB = 10 V IOUTA = AGNDA = 0 V, IOUTB = AGNDB = 0 V. All specifications TMIN to TMAX unless otherwise noted.

Parameter

ACCURACY Resolution Relative Accuracy Differential Nonlinearity Gain Error Gain Temperature Coefficient2 Output Leakage Current IOUTA

IOUTB

REFERENCE INPUT Resistance

VREFA, VREFB Input Resistance Match

DIGITAL INPUTS VIH Input High Voltage VIL Input Low Voltage IIN Input Current +25°C TMIN to TMAX CIN Input Capacitance 2

POWER SUPPLY VDD IDD

A Version
ORDERING GUIDE

Relative Accuracy
± 1 LSB ± 1/2 LSB

Gain Error
± 6 LSB ± 3 LSB

Package Description

Small Outline Small Outline

Option

R-24 R-24

CAUTION ESD electrostatic discharge sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD7937 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.

WARNING!

ESD SENSITIVE DEVICE

AD7937

PIN FUNCTION DESCRIPTIONS
1 2 3 4 5 13, 14 12 15 16 17

Mnemonic

AGNDA IOUTA RFBA VREFA CS

DGND A0 A1 CLR

VREFB

RFBB

IOUTB

AGNDB

Analog Ground for DAC A. Current output terminal of DAC A. Feedback resistor for DAC A. Reference input to DAC A. Chip Select Input Active low. Eight data inputs,

Digital Ground. Address Line Address Line Clear Input. Active low. Clears all registers. Write Input. Active low. Updates DAC Registers from inputs registers. Power supply input. Nominally 5 V to 15 V, with ± 10% tolerance. Reference input to DAC B. Feedback resistor for DAC B. Current output terminal of DAC B. Analog Ground for DAC B.

PIN CONFIGURATION SOIC

AGNDA 1
24 AGNDB

IOUTA 2
23 IOUTB

RFBA 3
22 RFBB

VREFA CS

DB0 DB1
21 VREFB
5 AD7937 20 VDD 6 TOP VIEW 19 UPD 7 Not to Scale 18 WR

DB2 8
17 CLR

DB3 9
16 A1

DB4 10
15 A0

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived AD7937BR Datasheet file may be downloaded here without warranties.

Datasheet ID: AD7937BR 517745