AD7845JP-REEL

AD7845JP-REEL Datasheet

AD7845

Part	Datasheet
AD7845JP-REEL	AD7845JP-REEL (pdf)

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LC2MOS Complete 12-Bit Multiplying DAC AD7845 FEATURES 12-Bit CMOS MDAC with Output Amplifier 4-Quadrant Multiplication Guaranteed Monotonic TMIN to TMAX Space-Saving DIPs and 24- or 28-Terminal Surface Mount Packages Application Resistors On Chip for Gain Ranging, etc. Low Power LC2MOS APPLICATIONS Automatic Test Equipment Digital Attenuators Programmable Power Supplies Programmable Gain Amplifiers mA Converters FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION The AD7845 is the industry’s first 4-quadrant multiplying D/A converter with an on-chip amplifier. It is fabricated on the LC2MOS process, which allows precision linear components and digital circuitry to be implemented on the same chip. The 12 data inputs drive latches which are controlled by standard CS and WR signals, making microprocessor interfacing simple. For stand-alone operation, the CS and WR inputs can be tied to ground, making all latches transparent. All digital inputs are TTL and 5 V CMOS compatible. The output amplifier can supply ± 10 V into a 2 load. It is internally compensated, and its input offset voltage is low due to laser trimming at wafer level. For normal operation, RFB is tied to VOUT, but the user may alternatively choose RA, RB or RC to scale the output voltage range. PRODUCT HIGHLIGHTS Voltage Output Multiplying DAC The AD7845 is the first DAC which has a full 4-quadrant multiplying capability and an output amplifier on chip. All specifications include amplifier performance. Matched Application Resistors Three application resistors provide an easy facility for gain ranging, voltage offsetting, etc. Space Saving The AD7845 saves space in two ways. The integration of the output amplifier on chip means that chip count is reduced. The part is housed in skinny 24-lead DIP, 28-terminal LCC and PLCC and 24-terminal SOIC packages. Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel 781/329-4700 World Wide Web Site: Fax 781/326-8703 Analog Devices, Inc., 1999 AD7845* Product Page Quick Links Last Content Update 08/30/2016 Comparable Parts View a parametric search of comparable parts Documentation Data Sheet • AD7845 LC2MOS Complete 12-Bit Multiplying DAC Data Sheet Reference Materials Solutions Bulletins & Brochures • Digital to Analog Converters ICs Solutions Bulletin Design Resources • AD7845 Material Declaration • PCN-PDN Information • Quality And Reliability • Symbols and Footprints Discussions View all AD7845 EngineerZone Discussions Sample and Buy Visit the product page to see pricing options Technical Support Submit a technical question or find your regional support number VDD = +15 V, 5%, VSS = V, 5%, VREF = +10 V, AGND = DGND = O V, VOUT connected to RFB. VOUT load = 2 100 pF. All specifications TMIN to TMAX unless otherwise noted. Parameter J Version ACCURACY Resolution Relative Accuracy ORDERING GUIDE1 Model2 Temperature Range Relative Accuracy Package Option3 AD7845JN AD7845KN AD7845JP AD7845KP AD7845JR AD7845KR AD7845AQ AD7845BQ AD7845AR AD7845BR AD7845SQ/883B AD7845TQ/883B AD7845SE/883B 0°C to +70°C 0°C to +70°C 0°C to +70°C 0°C to +70°C 0°C to +70°C 0°C to +70°C to +85°C to +85°C to +85°C to +85°C to +125°C to +125°C to +125°C ± 1 LSB ± 1/2 LSB ± 1 LSB ± 1/2 LSB ± 1 LSB ± 1/2 LSB ± 1 LSB ± 1/2 LSB ± 1 LSB ± 1/2 LSB ± 1 LSB ± 1/2 LSB ± 1 LSB N-24 N-24 P-28A P-28A R-24 R-24 Q-24 Q-24 R-24 R-24 Q-24 Q-24 E-28A NOTES 1Analog Devices reserves the right to ship either ceramic D-24A or cerdip Q-24 hermetic packages. 2To order MIL-STD-883, Class B processed parts, add /883B to part number. 3E = Leadless Ceramic Chip Carrier N = Plastic DIP P = Plastic Leaded Chip Carrier Q = Cerdip R = SOIC. 5V WR 5V DATA NOTES ALL INPUT SIGNAL RISE AND FALL TIMES MEASURED FROM 10% TO 90% OF +5V. tR = tF = 20ns. TIMING MEASUREMENT REFERENCE LEVEL Figure AD7845 Timing Diagram AD7845 DIP, SOIC PIN CONFIGURATIONS LCC PLCC TERMINOLOGY LEAST SIGNIFICANT BIT This is the analog weighting of 1 bit of the digital word in a DAC. For the AD7845, 1 LSB = VREF 212 RELATIVE ACCURACY Relative accuracy or endpoint nonlinearity is a measure of the maximum deviation from a straight line passing through the endpoints of the DAC transfer function. It is measured after adjusting for both endpoints i.e., offset and gain error are adjusted out and is normally expressed in least significant bits or as a percentage of full-scale range. DIFFERENTIAL NONLINEARITY Differential nonlinearity is the difference between the measured change and the ideal 1 LSB change between any two adjacent codes. A specified differential nonlinearity of +1 LSB max over the operating temperature range ensures monotonicity. GAIN ERROR Gain error is a measure of the output error between an ideal DAC and the actual device output with all 1s loaded after offset error has been adjusted out. Gain error is adjustable to zero with an external potentiometer. See Figure ZERO CODE OFFSET ERROR This is the error present at the device output with all 0s loaded in the DAC. It is due to the op amp input offset voltage and bias current and the DAC leakage current. TOTAL HARMONIC DISTORTION This is the ratio of the root-mean-square rms sum of the harmonics to the fundamental, expressed in dBs. OUTPUT NOISE This is the noise due to the white noise of the DAC and the input noise of the amplifier. DIGITAL-TO-ANALOG GLITCH IMPULSE This is the amount of charge injected from the digital inputs to the analog output when the inputs change state. This is normally specified as the area of the glitch in either pA-secs or nV-secs depending upon whether the glitch is measured as a current or voltage. The measurement takes place with VREF = AGND. DIGITAL FEEDTHROUGH When the DAC is not selected i.e., CS is high frequency logic activity on the device digital inputs is capacitively coupled through the device to show up as noise on the VOUT pin. This noise is digital feedthrough. MULTIPLYING FEEDTHROUGH ERROR This is ac error due to capacitive feedthrough from the VREF terminal to VOUT when the DAC is loaded with all 0s. OPEN-LOOP GAIN Open-loop gain is defined as the ratio of a change of output voltage to the voltage applied at the VREF pin with all 1s loaded in the DAC. It is specified at dc. UNITY GAIN SMALL SIGNAL BANDWIDTH This is the frequency at which the magnitude of the small signal voltage gain of the output amplifier is 3 dB below unity. The device is operated as a closed-loop unity gain inverter i.e., DAC is loaded with all 1s . OUTPUT RESISTANCE This is the effective output source resistance. FULL POWER BANDWIDTH Full power bandwidth is specified as the maximum frequency, at unity closed-loop gain, for which a sinusoidal input signal will produce full output at rated load without exceeding a distortion level of Typical Performance Figure Frequency Response, G = Figure Output Voltage Swing vs. Resistive Load

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LC2MOS Complete 12-Bit Multiplying DAC

AD7845

FEATURES 12-Bit CMOS MDAC with Output Amplifier 4-Quadrant Multiplication Guaranteed Monotonic TMIN to TMAX Space-Saving DIPs and 24- or 28-Terminal Surface

Mount Packages Application Resistors On Chip for Gain Ranging, etc. Low Power LC2MOS

APPLICATIONS Automatic Test Equipment Digital Attenuators Programmable Power Supplies Programmable Gain Amplifiers mA Converters

FUNCTIONAL BLOCK DIAGRAM

GENERAL DESCRIPTION The AD7845 is the industry’s first 4-quadrant multiplying D/A converter with an on-chip amplifier. It is fabricated on the LC2MOS process, which allows precision linear components and digital circuitry to be implemented on the same chip.

The 12 data inputs drive latches which are controlled by standard CS and WR signals, making microprocessor interfacing simple. For stand-alone operation, the CS and WR inputs can be tied to ground, making all latches transparent. All digital inputs are TTL and 5 V CMOS compatible.

The output amplifier can supply ± 10 V into a 2 load. It is internally compensated, and its input offset voltage is low due to laser trimming at wafer level. For normal operation, RFB is tied to VOUT, but the user may alternatively choose RA, RB or RC to scale the output voltage range.

PRODUCT HIGHLIGHTS Voltage Output Multiplying DAC

The AD7845 is the first DAC which has a full 4-quadrant multiplying capability and an output amplifier on chip. All specifications include amplifier performance.

Matched Application Resistors Three application resistors provide an easy facility for gain ranging, voltage offsetting, etc.

Space Saving The AD7845 saves space in two ways. The integration of the output amplifier on chip means that chip count is reduced. The part is housed in skinny 24-lead DIP, 28-terminal LCC and PLCC and 24-terminal SOIC packages.

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel 781/329-4700 World Wide Web Site:

Fax 781/326-8703

Analog Devices, Inc., 1999

AD7845* Product Page Quick Links

Last Content Update 08/30/2016

Comparable Parts

View a parametric search of comparable parts

Documentation

Data Sheet
• AD7845 LC2MOS Complete 12-Bit Multiplying DAC

Data Sheet

Reference Materials

Solutions Bulletins & Brochures
• Digital to Analog Converters ICs Solutions Bulletin

Design Resources
• AD7845 Material Declaration
• PCN-PDN Information
• Quality And Reliability
• Symbols and Footprints

Discussions

View all AD7845 EngineerZone Discussions

Sample and Buy

Visit the product page to see pricing options

Technical Support

Submit a technical question or find your regional support number

VDD = +15 V, 5%, VSS = V, 5%, VREF = +10 V, AGND = DGND = O V, VOUT connected to RFB. VOUT load = 2 100 pF. All specifications TMIN to TMAX unless otherwise noted.

Parameter

J Version

ACCURACY

Resolution

Relative Accuracy
ORDERING GUIDE1

Model2

Temperature Range

Relative

Accuracy Package Option3

AD7845JN AD7845KN AD7845JP AD7845KP AD7845JR AD7845KR AD7845AQ AD7845BQ AD7845AR AD7845BR AD7845SQ/883B AD7845TQ/883B AD7845SE/883B
0°C to +70°C 0°C to +70°C 0°C to +70°C 0°C to +70°C 0°C to +70°C 0°C to +70°C to +85°C to +85°C to +85°C to +85°C to +125°C to +125°C to +125°C
± 1 LSB ± 1/2 LSB ± 1 LSB ± 1/2 LSB ± 1 LSB ± 1/2 LSB ± 1 LSB ± 1/2 LSB ± 1 LSB ± 1/2 LSB ± 1 LSB ± 1/2 LSB ± 1 LSB

N-24 N-24 P-28A P-28A R-24 R-24 Q-24 Q-24 R-24 R-24 Q-24 Q-24 E-28A

NOTES 1Analog Devices reserves the right to ship either ceramic D-24A or cerdip Q-24 hermetic packages. 2To order MIL-STD-883, Class B processed parts, add /883B to part number. 3E = Leadless Ceramic Chip Carrier N = Plastic DIP P = Plastic Leaded Chip Carrier Q = Cerdip R = SOIC.
5V WR
5V DATA

NOTES

ALL INPUT SIGNAL RISE AND FALL TIMES MEASURED FROM
10% TO 90% OF +5V. tR = tF = 20ns. TIMING MEASUREMENT REFERENCE

LEVEL

Figure AD7845 Timing Diagram

AD7845

DIP, SOIC

PIN CONFIGURATIONS LCC

PLCC

TERMINOLOGY

LEAST SIGNIFICANT BIT

This is the analog weighting of 1 bit of the digital word in a

DAC. For the AD7845, 1 LSB =

VREF 212

RELATIVE ACCURACY Relative accuracy or endpoint nonlinearity is a measure of the maximum deviation from a straight line passing through the endpoints of the DAC transfer function. It is measured after adjusting for both endpoints i.e., offset and gain error are adjusted out and is normally expressed in least significant bits or as a percentage of full-scale range.

DIFFERENTIAL NONLINEARITY Differential nonlinearity is the difference between the measured change and the ideal 1 LSB change between any two adjacent codes. A specified differential nonlinearity of +1 LSB max over the operating temperature range ensures monotonicity.

GAIN ERROR Gain error is a measure of the output error between an ideal DAC and the actual device output with all 1s loaded after offset error has been adjusted out. Gain error is adjustable to zero with an external potentiometer. See Figure

ZERO CODE OFFSET ERROR This is the error present at the device output with all 0s loaded in the DAC. It is due to the op amp input offset voltage and bias current and the DAC leakage current.

TOTAL HARMONIC DISTORTION This is the ratio of the root-mean-square rms sum of the harmonics to the fundamental, expressed in dBs.

OUTPUT NOISE This is the noise due to the white noise of the DAC and the input noise of the amplifier.

DIGITAL-TO-ANALOG GLITCH IMPULSE This is the amount of charge injected from the digital inputs to the analog output when the inputs change state. This is normally specified as the area of the glitch in either pA-secs or nV-secs depending upon whether the glitch is measured as a current or voltage. The measurement takes place with VREF = AGND.

DIGITAL FEEDTHROUGH When the DAC is not selected i.e., CS is high frequency logic activity on the device digital inputs is capacitively coupled through the device to show up as noise on the VOUT pin. This noise is digital feedthrough.

MULTIPLYING FEEDTHROUGH ERROR This is ac error due to capacitive feedthrough from the VREF terminal to VOUT when the DAC is loaded with all 0s.

OPEN-LOOP GAIN Open-loop gain is defined as the ratio of a change of output voltage to the voltage applied at the VREF pin with all 1s loaded in the DAC. It is specified at dc.

UNITY GAIN SMALL SIGNAL BANDWIDTH This is the frequency at which the magnitude of the small signal voltage gain of the output amplifier is 3 dB below unity. The device is operated as a closed-loop unity gain inverter i.e., DAC is loaded with all 1s .

OUTPUT RESISTANCE This is the effective output source resistance.

FULL POWER BANDWIDTH Full power bandwidth is specified as the maximum frequency, at unity closed-loop gain, for which a sinusoidal input signal will produce full output at rated load without exceeding a distortion level of

Typical Performance

Figure Frequency Response, G = Figure Output Voltage Swing vs. Resistive Load

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Datasheet ID: AD7845JP-REEL 517739