AD7715ACHIPS-3

AD7715ACHIPS-3 Datasheet


Three-wire serial interface SPI-, QSPI -, MICROWIRE -, and DSP-compatible Ability to buffer the analog input 3 V AD7715-3 or 5 V AD7715-5 operation Low supply current 450 µA maximum 3 V supplies Low-pass filter with programmable output update 16-lead SOIC/PDIP/TSSOP

Part Datasheet
AD7715ACHIPS-3 AD7715ACHIPS-3 AD7715ACHIPS-3 (pdf)
Related Parts Information
AD7715ACHIPS-5 AD7715ACHIPS-5 AD7715ACHIPS-5
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Data Sheet

Charge-balancing ADC 16-bits no missing codes nonlinearity

Programmable gain front end Gains of 1, 2, 32 and 128 Differential input capability

Three-wire serial interface SPI-, QSPI -, MICROWIRE -, and DSP-compatible Ability to buffer the analog input 3 V AD7715-3 or 5 V AD7715-5 operation Low supply current 450 µA maximum 3 V supplies Low-pass filter with programmable output update 16-lead SOIC/PDIP/TSSOP

The AD7715 is a complete analog front end for low frequency measurement applications. The part can accept low level input signals directly from a transducer and outputs a serial digital word. It employs a conversion technique to realize up to 16 bits of no missing codes performance. The input signal is applied to a proprietary programmable gain front end based around an analog modulator. The modulator output is processed by an on-chip digital filter. The first notch of this digital filter can be programmed via the on-chip control register allowing adjustment of the filter cutoff and output update rate.

The AD7715 features a differential analog input as well as a differential reference input. It operates from a single supply 3 V or 5 V . It can handle unipolar input signal ranges of 0 mV to 20 mV, 0 mV to 80 mV, 0 V to V and 0 V to V. It can also handle bipolar input signal ranges of ±20 mV, ±80 mV, V and V. These bipolar ranges are referenced to the negative input of the differential analog input. The AD7715 thus performs all signal conditioning and conversion for a single channel system.

The AD7715 is ideal for use in smart, microcontroller, or DSPbased systems. It features a serial interface that can be configured for three-wire operation. Gain settings, signal polarity, and update rate selection can be configured in software using the input serial port. The part contains self-calibration and system calibration options to eliminate gain and offset errors on the part itself or in the system.
3 V/5 V, 450 µA 16-Bit, Sigma-Delta ADC

AD7715

FUNCTIONAL BLOCK DIAGRAM

REF IN +

AVDD DVDD

AIN +

BUFFER PGA

CHARGE BALANCING ADC

MODULATOR

DIGITAL FILTER

A = 1 TO 128

SERIAL INTERFACE

CLOCK GENERATION

REGISTER BANK

AD7715

AGND DGND

Figure

MCLK IN MCLK OUT RESET

SCLK CS DIN DOUT DRDY
08519-001

CMOS construction ensures very low power dissipation, and power-down mode reduces the standby power consumption to 50 µW typical. The part is available in a 16-lead, inch-wide, plastic dual-in-line package PDIP as well as a 16-lead inch wide small outline SOIC_W package and a 16-lead TSSOP package.

PRODUCT HIGHLIGHTS

The AD7715 consumes less than 450 µA in total supply current at 3 V supplies and 1 MHz master clock, making it ideal for use in low-power systems. Standby current is less than 10 µA.

The programmable gain input allows the AD7715 to accept input signals directly from a strain gage or transducer removing a considerable amount of signal conditioning.

The AD7715 is ideal for microcontroller or DSP processor applications with a three-wire serial interface reducing the number of interconnect lines and reducing the number of optocouplers required in isolated systems. The part contains on-chip registers which allow software control over output update rate, input gain, signal polarity, and calibration modes.

The part features excellent static performance specifications with 16-bits no missing codes, accuracy, and low rms noise <550 nV . Endpoint errors and the effects of temperature drift are eliminated by on-chip calibration options, which remove zero-scale and full-scale errors.

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Data Sheet
Digital 21 Analog 23 Using the AD7715 26 Clocking and Oscillator Circuit 26 System Synchronization 26 Reset Input 27 Standby Mode 27 Accuracy 27 Drift Considerations 27 Power Supplies 28 Digital Interface 29 Configuring the 31 Microcontroller/Microprocessor Interfacing 32 AD7715 to 68HC11 Interface 32 AD7715 to 8XC51 33 AD7715 to ADSP-2184N/ADSP-2185N/ADSP-2186N/ ADSP-2187N/ADSP-2188N/ADSP-2189N Interface............ 33 Code For Setting Up The 34 C Code for Interfacing AD7715 to 68HC11........................... 34 Applications Information 36 Pressure 36 Temperature Measurement 37 Smart 38 Outline Dimensions 39 Ordering Guide 40

Data Sheet

AD7715

SPECIFICATIONS

AD7715-5

AVDD = 5 V, DVDD = 3 V or 5 V, REF IN + = V REF IN − = AGND fCLK IN = MHz, unless otherwise noted. All specifications TMIN to TMAX, unless otherwise noted.

Table

Parameter1 STATIC PERFORMANCE

No Missing Codes Output Noise Integral Nonlinearity Unipolar Offset Error2 Unipolar Offset Drift3 Bipolar Zero Error2 Bipolar Zero Drift3 Positive Full-Scale Error2, 4 Full-Scale Drift3, 5 Gain Error2, 6 Gain Drift3, 7

Bipolar Negative Full-Scale Error2 Bipolar Negative Full-Scale Drift3

ANALOG INPUTS/REFERENCE INPUTS Input Common-Mode Rejection CMR Normal-Mode 50 Hz Rejection8 Normal-Mode 60 Hz Rejection8 Common-Mode 50 Hz Rejection8 Common-Mode 60 Hz Rejection8 Common-Mode Voltage Range9 Absolute AIN/REF IN Voltage8 Absolute/Common-Mode AIN Voltage9 AIN DC Input Current8 AIN Sampling Capacitance8 AIN Differential Voltage Range10

AIN Input Sampling Rate, fS

REF IN + − REF IN − Voltage

REF IN Input Sampling Rate, fS LOGIC INPUTS

Input Current All Inputs Except MCLK IN

VINL, Input Low Voltage VINL, Input Low Voltage VINH, Input High Voltage VINH, Input High Voltage MCLK IN Only VINL, Input Low Voltage VINL, Input Low Voltage VINH, Input High Voltage VINH, Input High Voltage

Unit

Bits

See Table 15 to Table 18
% of FSR

See Table 15 to Table 22
uV/°C

See Table 15 to Table 22

See Table 15 to Table 22
uV/°C

See Table 15 to Table 22
uV/°C
ppm of

FSR/°C
% of FSR
uV/°C
uV/°C
90 98 150 AGND +

AVDD

AVDD + V

AVDD − V
1 10 0 to +VREF/GAIN11 ±VREF/GAIN x fCLK IN/64 fCLK IN/8
nA pF nom

V nom
fCLK IN/64
±10
ORDERING GUIDE

Model1 AD7715AN-5 AD7715ANZ-5 AD7715AR-5 AD7715AR-5REEL AD7715ARZ-5 AD7715ARZ-5REEL AD7715ARUZ-5 AD7715ARUZ-5REEL7 AD7715ACHIPS-5 AD7715ANZ-3 AD7715AR-3 AD7715ARZ-3 AD7715ARZ-3REEL AD7715ARUZ-3 AD7715ARUZ-3REEL7 AD7715ACHIPS-3
1 Z = RoHS Compliant Part.

PIN 1

SEATING PLANE

COPLANARITY

COMPLIANT TO JEDEC STANDARDS MO-153-AB

Figure 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16

Dimensions shown in millimeters

AVDD Supply 5V 3V

Temperature Range −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C

Package Description 16-Lead Plastic Dual In-Line Package [PDIP] 16-Lead Plastic Dual In-Line Package [PDIP] 16-Lead Standard Small Outline Package [SOIC_W] 16-Lead Standard Small Outline Package [SOIC_W] 16-Lead Standard Small Outline Package [SOIC_W] 16-Lead Standard Small Outline Package [SOIC_W] 16-Lead Thin Shrink Small Outline Package [TSSOP] 16-Lead Thin Shrink Small Outline Package [TSSOP] Chips 16-Lead Plastic Dual In-Line Package [PDIP] 16-Lead Standard Small Outline Package [SOIC_W] 16-Lead Standard Small Outline Package [SOIC_W] 16-Lead Standard Small Outline Package [SOIC_W] 16-Lead Thin Shrink Small Outline Package [TSSOP] 16-Lead Thin Shrink Small Outline Package [TSSOP] Chips

Package Option N-16 N-16 RW-16 RW-16 RW-16 RW-16 RU-16 RU-16

N-16 RW-16 RW-16 RW-16 RU-16 RU-16
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D08519-0-6/15 E
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Datasheet ID: AD7715ACHIPS-3 517736