AD7228KP-REEL

AD7228KP-REEL Datasheet

The AD7228 contains eight 8-bit voltage mode digital-to- analog converters DACs , with output buffer amplifiers and interface logic on a single monolithic chip. No external trims are required to achieve the full specified performance for the device.

Part	Datasheet
AD7228KP-REEL	AD7228KP-REEL (pdf)

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Data Sheet Eight 8-bit DACs with output amplifiers Operates with single or dual supplies Microprocessor-compatible 95 ns WR pulse No user trims required Skinny 24-lead PDIP, CERDIP, and SOIC packages, and a 28-lead PLCC surface-mount package The AD7228 contains eight 8-bit voltage mode digital-to- analog converters DACs , with output buffer amplifiers and interface logic on a single monolithic chip. No external trims are required to achieve the full specified performance for the device. Separate on-chip latches are provided for each of the eight DACs. Data is transferred into the data latches through a common 8-bit, TTL/CMOS-compatible input port 5 V . The A0, A1, and A2 address inputs determine which latch is loaded when WR goes low. The control logic is speed compatible with most 8-bit microprocessors. Specified performance is guaranteed for input reference voltages from 2 V to 10 V when using dual supplies. The device is also specified for single-supply operation using a reference of 10 V. Each output buffer amplifier is capable of developing 10 V across a 2 kΩ load. The AD7228 is fabricated on an all ion implanted, high speed, linear-compatible CMOS LC2MOS process, specifically Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. DATA BUS 13034-001 LC2MOS Octal 8-Bit DAC AD7228 FUNCTIONAL BLOCK DIAGRAM VREF LATCH 1 DAC 1 9 VOUT1 LATCH 2 DAC 2 8 VOUT2 LATCH 3 DAC 3 7 VOUT3 MSB 13 DATA 8-BIT LSB 20 LATCH 4 LATCH 5 DAC 4 DAC 5 6 VOUT4 5 VOUT5 LATCH 6 DAC 6 4 VOUT6 LATCH 7 DAC 7 3 VOUT7 LATCH 8 DAC 8 Ordering Guide 15 Changes to Absolute Maximum Ratings Section and Table Added Table 5 Renumbered Sequentially Added 5 V Single-Supply Operation Section 12 Updated Outline Dimensions 14 Changes to Ordering Guide 15 Data Sheet AD7228 SPECIFICATIONS DUAL SUPPLY VDD = V to V, VSS = −5 V ± 10%, GND = 0 V, VREF = 2 V to 10 V, RL = 2 kΩ, CL = 100 pF, unless otherwise noted. All specifications TMIN to TMAX, −40°C to +85°C unless otherwise noted. VOUT must be less than VDD by V to ensure correct operation. Table Parameter STATIC PERFORMANCE Resolution Total Unadjusted Error TUE 1 Relative Accuracy Differential Nonlinearity Full-Scale Error2 Zero Code Error at 25°C TMIN to TMAX Minimum Load Resistance REFERENCE INPUT Voltage Range Input Resistance Input Capacitance3 AC Feedthrough DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Leakage Current Input Capacitance3 Input Coding DYNAMIC PERFORMANCE3 Voltage Output Slew Rate Voltage Output Settling Time Positive Full-Scale Change Negative Full-Scale Change Digital Feedthrough Digital Crosstalk4 POWER SUPPLIES VDD Range VSS Range IDD at 25°C TMIN to TMAX ISS at 25°C TMIN to TMAX K and B Versions 8 ±2 ±1 ±1 ±1 ±25 ±30 2 2/10 2 500 −70 ±1 8 Binary 16 20 14 18 L and C Versions 8 ±1 ±1/2 ±1 ±1/2 ±15 ±20 2 2/10 2 500 −70 ±1 8 Binary 16 20 14 18 Unit Test Conditions/Comments Bits LSB max LSB max LSB max LSB max VDD = 15 V ± 10%, VREF = 10 V Guaranteed monotonic Typical temperature coefficient is 5 ppm/°C with VREF = 10 V mV max mV max kΩ min Typical temperature coefficient is 30 uV/°C VOUT = 10 V V min/V max kΩ min pF max dB typ Occurs when each DAC is loaded with all 1s VREF = 8 V p-p sine wave at 10 kHz V min V max uA max pF max VIN = 0 V or VDD V/us min us max us max nV-sec typ nV-sec typ VREF = 10 V settling time to ±1/2 LSB VREF = 10 V settling time to ±1/2 LSB Code transition all 0s to all 1s, VREF = 0 V WR = VDD Code transition all 0s to all 1s, VREF = 10 V WR = 0 V ORDERING GUIDE Model1 AD7228BQ AD7228CQ AD7228KN AD7228KNZ AD7228KP-REEL AD7228KPZ AD7228KR AD7228KRZ AD7228LNZ AD7228LPZ COMPLIANT TO JEDEC STANDARDS MO-047-AB CONTROLLING DIMENSIONS ARE IN INCHES MILLIMETER DIMENSIONS IN PARENTHESES ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure 28-Lead Plastic Leaded Chip Carrier [PLCC] P-28 Dimensions shown in inches and millimeters Temperature Range −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C Maximum TUE LSB ±2 ±1 ±2 ±2 ±2 ±2 ±2 ±2 ±2 ±1 ±1 Package Description 24-Lead CERDIP 24-Lead CERDIP 24-Lead PDIP 24-Lead PDIP 24-Lead PLCC 24-Lead PLCC 24-Lead PLCC 24-Lead SOIC_W 24-Lead SOIC_W 24-Lead PDIP 24-Lead PLCC 1 Z = RoHS Compliant Part. Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D13034-0-12/15 C 042508-A Package Option Q-24-1 Q-24-1 N-24-1 N-24-1 P-28 P-28 P-28 RW-24 RW-24 N-24-1 P-28

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Data Sheet

Eight 8-bit DACs with output amplifiers Operates with single or dual supplies Microprocessor-compatible 95 ns WR pulse No user trims required Skinny 24-lead PDIP, CERDIP, and SOIC packages, and a
28-lead PLCC surface-mount package

The AD7228 contains eight 8-bit voltage mode digital-to- analog converters DACs , with output buffer amplifiers and interface logic on a single monolithic chip. No external trims are required to achieve the full specified performance for the device.

Separate on-chip latches are provided for each of the eight DACs. Data is transferred into the data latches through a common 8-bit, TTL/CMOS-compatible input port 5 V . The A0, A1, and A2 address inputs determine which latch is loaded when WR goes low. The control logic is speed compatible with most 8-bit microprocessors.

Specified performance is guaranteed for input reference voltages from 2 V to 10 V when using dual supplies. The device is also specified for single-supply operation using a reference of 10 V. Each output buffer amplifier is capable of developing 10 V across a 2 kΩ load.

The AD7228 is fabricated on an all ion implanted, high speed, linear-compatible CMOS LC2MOS process, specifically

Document Feedback

Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks and registered trademarks are the property of their respective owners.

DATA BUS
13034-001

LC2MOS Octal 8-Bit DAC AD7228

FUNCTIONAL BLOCK DIAGRAM

VREF

LATCH 1

DAC 1
9 VOUT1

LATCH 2

DAC 2
8 VOUT2

LATCH 3

DAC 3
7 VOUT3

MSB 13 DATA 8-BIT

LSB 20

LATCH 4 LATCH 5

DAC 4 DAC 5
6 VOUT4
5 VOUT5

LATCH 6

DAC 6
4 VOUT6

LATCH 7

DAC 7
3 VOUT7

LATCH 8

DAC 8
Ordering Guide 15
Changes to Absolute Maximum Ratings Section and Table Added Table 5 Renumbered Sequentially Added 5 V Single-Supply Operation Section 12 Updated Outline Dimensions 14 Changes to Ordering Guide 15

Data Sheet

AD7228

SPECIFICATIONS

DUAL SUPPLY

VDD = V to V, VSS = −5 V ± 10%, GND = 0 V, VREF = 2 V to 10 V, RL = 2 kΩ, CL = 100 pF, unless otherwise noted. All specifications TMIN to TMAX, −40°C to +85°C unless otherwise noted. VOUT must be less than VDD by V to ensure correct operation.

Table

Parameter STATIC PERFORMANCE

Resolution Total Unadjusted Error TUE 1 Relative Accuracy Differential Nonlinearity Full-Scale Error2

Zero Code Error at 25°C TMIN to TMAX

Minimum Load Resistance REFERENCE INPUT

Voltage Range Input Resistance Input Capacitance3 AC Feedthrough DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Leakage Current Input Capacitance3 Input Coding DYNAMIC PERFORMANCE3 Voltage Output Slew Rate Voltage Output Settling Time

Positive Full-Scale Change Negative Full-Scale Change Digital Feedthrough Digital Crosstalk4 POWER SUPPLIES VDD Range VSS Range IDD at 25°C TMIN to TMAX ISS at 25°C TMIN to TMAX

K and B Versions
8 ±2 ±1 ±1 ±1
±25 ±30 2
2/10 2 500 −70
±1 8 Binary
16 20
14 18

L and C Versions
8 ±1 ±1/2 ±1 ±1/2
±15 ±20 2
2/10 2 500 −70
±1 8 Binary
16 20
14 18

Unit

Test Conditions/Comments

Bits LSB max LSB max LSB max LSB max

VDD = 15 V ± 10%, VREF = 10 V

Guaranteed monotonic Typical temperature coefficient is 5 ppm/°C with VREF = 10 V
mV max mV max kΩ min

Typical temperature coefficient is 30 uV/°C VOUT = 10 V

V min/V max kΩ min pF max dB typ

Occurs when each DAC is loaded with all 1s VREF = 8 V p-p sine wave at 10 kHz

V min V max uA max pF max

VIN = 0 V or VDD

V/us min
us max us max nV-sec typ nV-sec typ

VREF = 10 V settling time to ±1/2 LSB VREF = 10 V settling time to ±1/2 LSB Code transition all 0s to all 1s, VREF = 0 V WR = VDD Code transition all 0s to all 1s, VREF = 10 V WR = 0 V
ORDERING GUIDE

Model1 AD7228BQ AD7228CQ AD7228KN AD7228KNZ AD7228KP-REEL AD7228KPZ AD7228KR AD7228KRZ AD7228LNZ AD7228LPZ

COMPLIANT TO JEDEC STANDARDS MO-047-AB CONTROLLING DIMENSIONS ARE IN INCHES MILLIMETER DIMENSIONS IN PARENTHESES ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.

Figure 28-Lead Plastic Leaded Chip Carrier [PLCC] P-28

Dimensions shown in inches and millimeters

Temperature Range −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C

Maximum TUE LSB ±2 ±1 ±2 ±2 ±2 ±2 ±2 ±2 ±2 ±1 ±1

Package Description 24-Lead CERDIP 24-Lead CERDIP 24-Lead PDIP 24-Lead PDIP 24-Lead PLCC 24-Lead PLCC 24-Lead PLCC 24-Lead SOIC_W 24-Lead SOIC_W 24-Lead PDIP 24-Lead PLCC
1 Z = RoHS Compliant Part.

Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners.

D13034-0-12/15 C
042508-A

Package Option Q-24-1 Q-24-1 N-24-1 N-24-1 P-28 P-28 P-28 RW-24 RW-24 N-24-1 P-28

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Datasheet ID: AD7228KP-REEL 517726