AD1981BJST-REEL

AD1981BJST-REEL Datasheet

AC ’97 Codec AD1981B

Part	Datasheet
AD1981BJST-REEL	AD1981BJST-REEL (pdf)

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AC ’97 Codec AD1981B AC ’97 COMPATIBLE FEATURES ENHANCED FEATURES S/PDIF output, 20-bit data format, supporting 48 kHz and kHz sample rates Integrated stereo headphone amplifier Variable sample rate audio External audio power-down control >90 dB dynamic range Stereo full-duplex codec 20-bit PCM DAC 3 analog line-level stereo inputs for line-in, AUX, and CD Mono line-level phone input Dual MIC input with built-in programmable preamplifier High quality CD input with ground sense Mono output for speakerphone or internal speaker power management support 48-lead LQFP package, Pb-free available Stereo MIC preamplifier support Built-in digital equalizer function for optimized speaker sound Full-duplex variable sample rates from 7040 Hz to 48 kHz with 1 Hz resolution Jack sense pins for automatic output switching Software-programmed VREFOUT output for biasing microphone and external power amplifier Split power supplies V digital and 5 V analog Multiple codec configuration options FUNCTIONAL BLOCK DIAGRAM VREFOUT VREF XTL_OUT XTL_IN SPDIF MS 2CMIC MIC1 MIC2 PHONE_IN CD_L CD_GND CD_R AUX_L AUX_R LINE_IN_L LINE_IN_R AD1981B MIC PREAMP G CD DIFF AMP MONO_OUT VOLTAGE REFERENCE CODEC CORE PCM L/R ADC RATE 16-BIT ADC 16-BIT ADC SPDIF TX PLL ID0 RECORD SELECTOR 16-BIT ADC 16-BIT ADC ADC AND DAC SLOT LOGIC RESET SYNC BIT_CLK BYPASS 20-BIT DAC SDATA_OUT EQ CORE STORAGE AC '97 INTERFACE BYPASS MIX OUTPUT SELECTOR HP_OUT_L PCM-Out Volume 18 Record Select Control 19 Record Gain Register 19 General-Purpose Register 20 Power-Down Control/Status Register 21 Extended Audio ID Register 22 Extended Audio Status and Control Register......................... 22 PCM Front DAC Rate 23 PCM ADC Rate Register 23 SPDIF Control Register 24 EQ Control 24 EQ Data Register 26 Mixer ADC, Input Gain Register 26 Jack Sense/Audio Interrupt/Status Register............................ 27 Serial Configuration Register 29 Miscellaneous Control Bit Register 29 Vendor ID 31 Outline Dimensions 32 Ordering Guide 32 SPECIFICATIONS TEST CONDITIONS Standard test conditions, unless otherwise noted. Table Parameter Temperature Digital Supply DVDD Analog Supply AVDD Sample Rate fS Input Signal Analog Output Pass Band DAC Test Condition 25°C V 48 kHz 1008 Hz 20 Hz to 20 kHz Calibrated −3 dB Attenuation Relative to Full Scale 0 dB Input 10 Output Load LINE_OUT 32 Output Load HP_OUT Calibrated 0 dB Gain Input dB Relative to Full Scale GENERAL SPECIFICATIONS Table Parameter ANALOG INPUT Input Voltage RMS Values Assume Sine Wave Input LINE_IN, AUX, CD, PHONE_IN MIC_IN with 20 dB Gain MIC_IN with 0 dB Gain Input Impedance1 Input Capacitance1 MASTER VOLUME Step Size 0 dB to dB LINE_OUT_L, LINE_OUT_R Output Attenuation Range1 Step Size 0 dB to dB MONO_OUT Output Attenuation Range1 Step Size 0 dB to dB HP_OUT_R, HP_OUT_L Output Attenuation Range Span1 Mute Attenuation of 0 dB Fundamental1 PROGRAMMABLE GAIN Step Size 0 dB to dB PGA Gain Range ANALOG GAIN/AMPLIFIERS/ATTENUATORS Signal-to-Noise Ratio SNR CD to LINE_OUT Other to LINE_OUT1 AD1981B Unit V rms V p-p V rms V p-p V rms V p-p pF AD1981B Parameter Step Size +12 dB to dB All Steps Tested MIC_IN, LINE_IN, CD, AUX, PHONE_IN, DAC Input Gain/Attenuation Range MIC_IN, LINE_IN, CD, AUX, PHONE_IN, DAC DIGITAL DECIMATION AND INTERPOLATION FILTERS1 Pass Band Pass-Band Ripple Transition Band Stop Band Stop-Band Rejection Group Delay Group Delay Variation over Pass Band ANALOG-TO-DIGITAL CONVERTERS Resolution Total Harmonic Distortion THD Dynamic Range −60 dB Input THD + N Referenced to Full Scale, A-Weighted Signal-to-Intermodulation Distortion1 CCIF Method ADC Crosstalk1 Line Inputs Input L, Ground R, Read R Input R, Ground L, Read L Line_In to Other Gain Error2 Full-Scale Span Relative to Nominal Input Voltage Interchannel Gain Mismatch Difference of Gain Errors ADC Offset Error1 DIGITAL-TO-ANALOG CONVERTERS Resolution Total Harmonic Distortion THD LINE_OUT Total Harmonic Distortion THD HP_OUT Dynamic Range −60 dB Input THD + N Referenced to Full Scale, A-Weighted Signal-to-Intermodulation Distortion1 CCIF Method Gain Error2 Output FS Voltage Relative to Nominal Output FS Voltage Interchannel Gain Mismatch Difference of Gain Errors DAC Crosstalk1 Input L, Zero R, Measure R_OUT Input R, Zero L, Measure L_OUT Total Audible Out-of-Band Energy1 Measured from x fS to 20 kHz ANALOG OUTPUT Full-Scale Output Voltage LINE_OUT and MONO_OUT Output Impedance1 External Load Impedance1 Output Capacitance1 External Load Capacitance1 Full-Scale Output Voltage HP_OUT 0 dB Gain External Load Impedance1 VREF VREFOUT Programmable to V Nominal VREFOUT Current Drive Mute Click Muted Output Minus Unmuted Midscale DAC Output STATIC DIGITAL SPECIFICATIONS High Level Input Voltage VIH Digital Inputs Low Level Input Voltage VIL ORDERING GUIDE Model AD1981BJST-REEL AD1981BJSTZ1 AD1981BJSTZ-REEL1 AD1981BBSTZ1, 2 AD1981BBSTZ-REEL1, 2 Temperature Range 0°C to 70°C 0°C to 70°C 0°C to 70°C 0°C to 70°C −40°C to +85°C −40°C to +85°C Package Description 48-Lead LQFP 48-Lead LQFP 48-Lead LQFP 48-Lead LQFP 48-Lead LQFP 48-Lead LQFP Package Option ST-48 ST-48 ST-48 ST-48 ST-48 ST-48 1Z = Pb-free part. The AD1981BJSTZ is a lead-free environmentally friendly product. It is manufactured using the most up-to-date materials and processes. The coating on the leads of each device is 100% pure tin electroplate. The device is suitable for lead-free applications and can withstand surface-mount soldering at up to 255°C ±5°C . In addition, it is backward compatible with conventional tin-lead soldering processes. This means that the electroplated tin coating can be soldered with tinlead solder pastes at reflow temperatures of 220°C to 235°C. 2 DVDD tolerance ±5% maximum. 2005 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners.

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AC ’97 Codec AD1981B

AC ’97 COMPATIBLE FEATURES

ENHANCED FEATURES

S/PDIF output, 20-bit data format, supporting 48 kHz and kHz sample rates

Integrated stereo headphone amplifier Variable sample rate audio External audio power-down control >90 dB dynamic range Stereo full-duplex codec 20-bit PCM DAC 3 analog line-level stereo inputs for line-in, AUX, and CD Mono line-level phone input Dual MIC input with built-in programmable preamplifier High quality CD input with ground sense Mono output for speakerphone or internal speaker
power management support 48-lead LQFP package, Pb-free available

Stereo MIC preamplifier support Built-in digital equalizer function for optimized
speaker sound Full-duplex variable sample rates from 7040 Hz to
48 kHz with 1 Hz resolution Jack sense pins for automatic output switching Software-programmed VREFOUT output for biasing
microphone and external power amplifier Split power supplies V digital and 5 V analog Multiple codec configuration options

FUNCTIONAL BLOCK DIAGRAM

VREFOUT

VREF

XTL_OUT XTL_IN SPDIF

MS 2CMIC

MIC1

MIC2 PHONE_IN

CD_L CD_GND

CD_R AUX_L AUX_R LINE_IN_L LINE_IN_R

AD1981B

MIC PREAMP G

CD DIFF AMP

MONO_OUT

VOLTAGE REFERENCE

CODEC CORE

PCM L/R ADC RATE
16-BIT ADC
16-BIT ADC

SPDIF TX

PLL ID0

RECORD SELECTOR
16-BIT ADC 16-BIT ADC

ADC AND DAC SLOT LOGIC

RESET SYNC BIT_CLK

BYPASS
20-BIT DAC

SDATA_OUT

EQ CORE STORAGE AC '97 INTERFACE

BYPASS

MIX OUTPUT SELECTOR

HP_OUT_L
PCM-Out Volume 18 Record Select Control 19 Record Gain Register 19 General-Purpose Register 20 Power-Down Control/Status Register 21 Extended Audio ID Register 22 Extended Audio Status and Control Register......................... 22 PCM Front DAC Rate 23 PCM ADC Rate Register 23 SPDIF Control Register 24 EQ Control 24 EQ Data Register 26 Mixer ADC, Input Gain Register 26 Jack Sense/Audio Interrupt/Status Register............................ 27 Serial Configuration Register 29 Miscellaneous Control Bit Register 29 Vendor ID 31 Outline Dimensions 32 Ordering Guide 32

SPECIFICATIONS

TEST CONDITIONS

Standard test conditions, unless otherwise noted.

Table Parameter Temperature Digital Supply DVDD Analog Supply AVDD Sample Rate fS Input Signal Analog Output Pass Band DAC

Test Condition 25°C V 48 kHz 1008 Hz 20 Hz to 20 kHz Calibrated −3 dB Attenuation Relative to Full Scale 0 dB Input 10 Output Load LINE_OUT 32 Output Load HP_OUT Calibrated 0 dB Gain Input dB Relative to Full Scale

GENERAL SPECIFICATIONS

Table

Parameter

ANALOG INPUT

Input Voltage RMS Values Assume Sine Wave Input

LINE_IN, AUX, CD, PHONE_IN

MIC_IN with 20 dB Gain

MIC_IN with 0 dB Gain

Input Impedance1

Input Capacitance1

MASTER VOLUME

Step Size 0 dB to dB LINE_OUT_L, LINE_OUT_R

Output Attenuation Range1

Step Size 0 dB to dB MONO_OUT

Output Attenuation Range1

Step Size 0 dB to dB HP_OUT_R, HP_OUT_L

Output Attenuation Range Span1

Mute Attenuation of 0 dB Fundamental1

PROGRAMMABLE GAIN

Step Size 0 dB to dB

PGA Gain Range

ANALOG GAIN/AMPLIFIERS/ATTENUATORS

Signal-to-Noise Ratio SNR

CD to LINE_OUT

Other to LINE_OUT1

AD1981B

Unit

V rms V p-p V rms V p-p V rms V p-p pF

AD1981B

Parameter Step Size +12 dB to dB All Steps Tested MIC_IN, LINE_IN, CD, AUX, PHONE_IN, DAC Input Gain/Attenuation Range MIC_IN, LINE_IN, CD, AUX, PHONE_IN, DAC

DIGITAL DECIMATION AND INTERPOLATION FILTERS1 Pass Band Pass-Band Ripple Transition Band Stop Band Stop-Band Rejection Group Delay Group Delay Variation over Pass Band

ANALOG-TO-DIGITAL CONVERTERS Resolution Total Harmonic Distortion THD Dynamic Range −60 dB Input THD + N Referenced to Full Scale, A-Weighted Signal-to-Intermodulation Distortion1 CCIF Method ADC Crosstalk1 Line Inputs Input L, Ground R, Read R Input R, Ground L, Read L Line_In to Other Gain Error2 Full-Scale Span Relative to Nominal Input Voltage Interchannel Gain Mismatch Difference of Gain Errors ADC Offset Error1

DIGITAL-TO-ANALOG CONVERTERS Resolution Total Harmonic Distortion THD LINE_OUT Total Harmonic Distortion THD HP_OUT Dynamic Range −60 dB Input THD + N Referenced to Full Scale, A-Weighted Signal-to-Intermodulation Distortion1 CCIF Method Gain Error2 Output FS Voltage Relative to Nominal Output FS Voltage Interchannel Gain Mismatch Difference of Gain Errors DAC Crosstalk1 Input L, Zero R, Measure R_OUT Input R, Zero L, Measure L_OUT Total Audible Out-of-Band Energy1 Measured from x fS to 20 kHz

ANALOG OUTPUT Full-Scale Output Voltage LINE_OUT and MONO_OUT

Output Impedance1 External Load Impedance1 Output Capacitance1 External Load Capacitance1 Full-Scale Output Voltage HP_OUT 0 dB Gain External Load Impedance1 VREF VREFOUT Programmable to V Nominal VREFOUT Current Drive Mute Click Muted Output Minus Unmuted Midscale DAC Output STATIC DIGITAL SPECIFICATIONS High Level Input Voltage VIH Digital Inputs Low Level Input Voltage VIL
ORDERING GUIDE

Model AD1981BJST-REEL AD1981BJSTZ1 AD1981BJSTZ-REEL1 AD1981BBSTZ1, 2 AD1981BBSTZ-REEL1, 2

Temperature Range 0°C to 70°C 0°C to 70°C 0°C to 70°C 0°C to 70°C −40°C to +85°C −40°C to +85°C

Package Description 48-Lead LQFP 48-Lead LQFP 48-Lead LQFP 48-Lead LQFP 48-Lead LQFP 48-Lead LQFP

Package Option ST-48 ST-48 ST-48 ST-48 ST-48 ST-48
1Z = Pb-free part. The AD1981BJSTZ is a lead-free environmentally friendly product. It is manufactured using the most up-to-date materials and processes. The coating on the leads of each device is 100% pure tin electroplate. The device is suitable for lead-free applications and can withstand surface-mount soldering at up to 255°C ±5°C . In addition, it is backward compatible with conventional tin-lead soldering processes. This means that the electroplated tin coating can be soldered with tinlead solder pastes at reflow temperatures of 220°C to 235°C.
2 DVDD tolerance ±5% maximum.
2005 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners.

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived AD1981BJST-REEL Datasheet file may be downloaded here without warranties.

Datasheet ID: AD1981BJST-REEL 517695