D 256 x 1 Sensor-Element Organization D 400 Dots-Per-Inch DPI Sensor Pitch D High Linearity and Uniformity D Wide Dynamic Range 4000:1 72 dB D Output Referenced to Ground D Low Image Lag Typ D Operation to 8 MHz D Single 3-V to 5-V Supply D Rail-to-Rail Output Swing AO D No External Load Resistor Required D Replacement for TSL1402
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TSL1402R (pdf) |
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D 256 x 1 Sensor-Element Organization D 400 Dots-Per-Inch DPI Sensor Pitch D High Linearity and Uniformity D Wide Dynamic Range 4000:1 72 dB D Output Referenced to Ground D Low Image Lag Typ D Operation to 8 MHz D Single 3-V to 5-V Supply D Rail-to-Rail Output Swing AO D No External Load Resistor Required D Replacement for TSL1402 TSL1402R 256 x 1 LINEAR SENSOR ARRAY WITH HOLD TAOS041G − NOVEMBER 2011 VDD 1 SI1 2 CLK 3 AO1 4 GND 5 SO2 6 NC 7 TOP VIEW 14 NC 13 SO1 12 GND 11 NC 10 SI2 9 NC 8 AO2 NC − No internal connection The TSL1402R linear sensor array consists of two sections of 128 photodiodes each and associated charge amplifier circuitry, aligned to form a contiguous 256 x 1 pixel array. The device incorporates a pixel data-hold function that provides simultaneous integration start and stop times for all pixels. The pixels measure um by um, with 63.5-um center-to-center spacing and 8-um spacing between pixels. Operation is simplified by internal logic requiring only a serial-input pulse SI and a clock. The TSL1402R is intended for use in a wide variety of applications including mark and code reading, OCR and contact imaging, edge detection and positioning, and optical encoding. Functional Block Diagram each section − pin numbers apply to section 1 Pixel 1 S1 1 Integrator 2 Reset Sample/Hold/ Output Pixel 2 Pixel 3 Pixel 128 Analog Bus Output Buffer Hold Switch Control Logic Q128 Gain Trim 1 VDD 5 GND 13 SO 3 CLK 128-Bit Shift Register The LUMENOLOGY r Company Texas Advanced Optoelectronic Solutions Inc. 1001 Klein Road S Suite 300 S Plano, TX 75074 S 972r 673-0759 Copyright E 2011, TAOS Inc. 1 TSL1402R 256 x 1 LINEAR SENSOR ARRAY WITH HOLD TAOS041G − NOVEMBER 2011 Terminal Functions TERMINAL NAME NO. 5,12 7, 9, 11, 14 Analog output of section Analog output of section Clock. Clk controls charge transfer, pixel output, and reset. Ground substrate . All voltages are referenced to GND. No internal connection. Serial input section SI1 defines the start of the data-out sequence for section Serial input section SI2 defines the start of the data-out sequence for section Serial output section SO1 provides a signal to drive the SI2 input in serial connection . Serial output section SO2 provides a signal to drive the SI input of another device for cascading or as an end-of-data indication. Supply voltage. Supply voltage for both analog and digital circuitry. |
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