AOZ1031AI_2

AOZ1031AI_2 Datasheet


AOZ1031AI

Part Datasheet
AOZ1031AI_2 AOZ1031AI_2 AOZ1031AI_2 (pdf)
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AOZ1031AI

EZBuck 3A Synchronous Buck Regulator

The AOZ1031A is a high efficiency, easy to use, 3A synchronous buck regulator. The AOZ1031A works from 4.5V to 18V input voltage range, and provides up to 3A of continuous output current with an output voltage adjustable down to 0.8V.

The AOZ1031A comes in a SO-8 package and is rated over a -40°C to +85°C operating ambient temperature range.
z 4.5V to 18V operating input voltage range z Synchronous Buck 80mΩ internal high-side switch
and 30mΩ internal low-side switch with integrated schottky diode z High efficiency up to 95% z Internal soft start z Output voltage adjustable to 0.8V z 3A continuous output current z Fixed 600kHz PWM operation z Pulse skipping at light load for high efficiency over entire load range z Cycle-by-cycle current limit z Pre-bias start-up z Short-circuit protection z Thermal shutdown z SO-8 package
z Point of load DC/DC converters z LCD TV z Set top boxes z DVD/Blu-ray players/recorders z Cable modems z PCIe graphics cards z Telecom/Networking/Datacom equipment

VIN C1 22µF

RC CC

AOZ1031 LX

COMP

AGND

PGND

L1 4.7µH R1 R2

VOUT

C2, C3 22µF

Figure 3.3V 3A Synchronous Buck Regulator

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AOZ1031AI
Ordering Information

Part Number AOZ1031AI

Ambient Temperature Range -40°C to +85°C

Package SO-8

Environmental

RoHS Compliant Green Product

AOS Green Products use reduced levels of Halogens, and are also RoHS compliant. Please visit for additional information.

Pin Configuration

PGND 1 VIN 2

AGND 3 FB 4

SO-8

Top View
8 LX 7 LX 6 EN 5 COMP

Pin Description

Pin Number Pin Name

PGND

AGND

COMP

Pin Function

Power ground. PGND needs to be electrically connected to AGND. Supply voltage input. When VIN rises above the UVLO threshold and EN is logic high, the device starts up. Analog ground. AGND is the reference point for controller section. AGND needs to be electrically connected to PGND. Feedback input. The FB pin is used to set the output voltage via a resistive voltage divider between the output and AGND. External loop compensation pin. Connect a RC network between COMP and AGND to compensate the control loop. Enable pin. Pull EN to logic high to enable the device. Pull EN to logic low to disable the device. Do not leave it open. Switching node. PWM output connection to inductor.

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Block Diagram

AOZ1031AI

UVLO
5V LDO

Internal
& POR

Regulator

Reference & Bias

Softstart

ILimit

ISen
0.8V

COMP

EAmp

PWM Comp

PWM Control Logic

Level Shifter
+ FET Driver

Frequency Foldback Comparator +
0.2V
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Datasheet ID: AOZ1031AI_2 516304