A6259KLW

A6259KLW Datasheet

A6259 8-Bit Addressable DMOS Power Driver

Part	Datasheet
A6259KLW	A6259KLW (pdf)

Related Parts	Information
A6259KLWTR	A6259KLWTR
A6259KA	A6259KA

PDF Datasheet Preview
A6259 8-Bit Addressable DMOS Power Driver Discontinued Product These parts are no longer in production The device should not be purchased for new design applications. Samples are no longer available. Date of status change April 30, 2007 Recommended Substitutions: NOTE For detailed information on purchasing options, contact your local Allegro field applications engineer or sales representative. Data Sheet 6259 8-BIT ADDRESSABLE DMOS POWER DRIVER POWER GROUND LOGIC SUPPLY S 0 LSB 3 OUT 0 4 OUT1 5 OUT 2 6 OUT 3 7 S1 8 LOGIC 9 GROUND POWER 10 GROUND LATCHES DECODER LOGIC LATCHES POWER GROUND 19 CLEAR 18 DATA 17 OUT7 16 OUT6 15 OUT5 14 OUT 4 EN 13 ENABLE 12 S2 MSB 11 POWER GROUND Dwg. PP-050-2 Note that the A6259KA DIP and the A6259KLW SOIC are electrically identical and share a common terminal number assignment. ABSOLUTE MAXIMUM RATINGS at TA = 25°C Output Voltage, VO 50 V Output Drain Current, Continuous, IO 250 mA* Peak, IOM 750 mA† Peak, IOM A† Single-Pulse Avalanche Energy, EAS 75 mJ Logic Supply Voltage, VDD V Input Voltage Range, VI V to V Package Power Dissipation, PD See Graph Operating Temperature Range, TA -40°C to +125°C Storage Temperature Range, TS -55°C to +150°C Each output, all outputs on. † Pulse duration 100 µs, duty cycle Caution These CMOS devices have input static protection Class 3 but are still susceptible to damage if exposed to extremely high static electrical charges. The A6259KA and A6259KLW combine a 3-to-8 line CMOS decoder and accompanying data latches, control circuitry, and DMOS outputs in a multi-functional power driver capable of storing single-line data in the addressable latches or use as a decoder or demuliplexer. Driver applications include relays, solenoids, and other medium-current or high-voltage peripheral power loads. The CMOS inputs and latches allow direct interfacing with microprocessor-based systems. Use with TTL may require appropriate pullup resistors to ensure an input logic high. Four modes of operation are selectable with the CLEAR and ENABLE inputs. The addressed DMOS output inverts the DATA input with all unaddressed outputs remaining in their previous states. All of the output drivers are disabled the DMOS sink drivers turned off with the CLEAR input low and the ENABLE input high. The A6259KA/KLW DMOS open-drain outputs are capable of sinking up to 750 mA. Similar devices with reduced rDS on are available as the A6A259.

PDF Datasheet Preview

A6259 8-Bit Addressable DMOS Power Driver

Discontinued Product

These parts are no longer in production The device should not be purchased for new design applications. Samples are no longer available.

Date of status change April 30, 2007

Recommended Substitutions:

NOTE For detailed information on purchasing options, contact your local Allegro field applications engineer or sales representative.

Data Sheet
6259
8-BIT ADDRESSABLE DMOS POWER DRIVER

POWER GROUND

LOGIC SUPPLY

S 0 LSB 3

OUT 0 4

OUT1 5

OUT 2 6

OUT 3 7

S1 8 LOGIC 9 GROUND POWER 10 GROUND

LATCHES DECODER LOGIC

LATCHES

POWER GROUND
19 CLEAR
18 DATA
17 OUT7 16 OUT6 15 OUT5 14 OUT 4 EN 13 ENABLE
12 S2 MSB
11 POWER GROUND

Dwg. PP-050-2

Note that the A6259KA DIP and the A6259KLW SOIC are electrically identical and share a common terminal number assignment.

ABSOLUTE MAXIMUM RATINGS at TA = 25°C

Output Voltage, VO 50 V Output Drain Current,

Continuous, IO 250 mA* Peak, IOM 750 mA*† Peak, IOM A† Single-Pulse Avalanche Energy,

EAS 75 mJ Logic Supply Voltage, VDD V Input Voltage Range,

VI V to V Package Power Dissipation,

PD See Graph Operating Temperature Range,

TA -40°C to +125°C Storage Temperature Range,

TS -55°C to +150°C
*Each output, all outputs on.
† Pulse duration 100 µs, duty cycle

Caution These CMOS devices have input static protection Class 3 but are still susceptible to damage if exposed to extremely high static electrical charges.

The A6259KA and A6259KLW combine a 3-to-8 line CMOS decoder and accompanying data latches, control circuitry, and DMOS outputs in a multi-functional power driver capable of storing single-line data in the addressable latches or use as a decoder or demuliplexer. Driver applications include relays, solenoids, and other medium-current or high-voltage peripheral power loads.

The CMOS inputs and latches allow direct interfacing with microprocessor-based systems. Use with TTL may require appropriate pullup resistors to ensure an input logic high. Four modes of operation are selectable with the CLEAR and ENABLE inputs.

The addressed DMOS output inverts the DATA input with all unaddressed outputs remaining in their previous states. All of the output drivers are disabled the DMOS sink drivers turned off with the CLEAR input low and the ENABLE input high. The A6259KA/KLW DMOS open-drain outputs are capable of sinking up to 750 mA. Similar devices with reduced rDS on are available as the A6A259.

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived A6259KLW Datasheet file may be downloaded here without warranties.

Datasheet ID: A6259KLW 516045