AK93C10AF

AK93C10AF Datasheet

[AK93C85A/95A/10A]

Part	Datasheet
AK93C10AF	AK93C10AF (pdf)

Related Parts	Information
AK93C95AF	AK93C95AF

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ASAHI KASEI [AK93C85A/95A/10A] AK93C85A / 95A / 10A 16K / 32K / 64Kbit Serial CMOS EEPROM ADVANCED CMOS EEPROM TECHNOLOGY READ/WRITE NON-VOLATILE MEMORY WIDE VCC OPERATION Vcc = 1.8V 5.5V AK93C85A 16384 bits, 1024 16 organization AK93C95A 32768 bits, 2048 16 organization AK93C10A 65536 bits, 4096 16 organization SERIAL INTERFACE - Interfaces with popular microcontrollers and standard microprocessors LOW POWER CONSUMPTION - 0.4mA max. Read Operation - Max. Standby HIGH RELIABILITY -Endurance 100K cycles -Data Retention 10 years Automatic address increment READ Automatic write cycle time-out with auto-ERASE Max. 8ms VCC=4.5V 5.5V Busy/Ready status signal Software controlled write protection IDEAL FOR LOW DENSITY DATA STORAGE - Low cost, space saving, 8-pin package DAM02E-01 Block Diagram -1- 1999/10 ASAHI KASEI [AK93C85A/95A/10A] General Description The AK93C85A/95A/10A is a 16384/32768/65536-bit serial CMOS EEPROM divided into 1024/2048/4096 registers of 16 bits each. The AK93C85A/95A/10A has 4 instructions such as READ, WRITE, EWEN and EWDS. Those instructions control the AK93C85A/95A/10A. The AK93C85A/95A/10A can operate full function under wide operating voltage range from 1.8V to 5.5V. The charge up circuit is integrated for high voltage generation that is used for write operation. A serial interface of AK93C85A/95A/10A, consisting of chip select CS , serial clock SK , data-in DI and data-out DO , can easily be controlled by popular microcontrollers or standard microprocessors. AK93C85A/95A/10A takes in the write data from data input pin DI to a register synchronously with rising edge of input pulse of serial clock pin SK . And at read operation, AK93C85A/95A/10A takes out the read data from a register to data output pin DO synchronously with rising edge of SK. The DO pin is usually in high impedance state. The DO pin outputs "L" or "H" in case of data output or Busy/Ready signal output. Software controlled write protection When Vcc is applied to the part, the part automatically powers up in the ERASE/WRITE Disable state. In the ERASE/WRITE disable state, execution of WRITE instruction is disabled. Before WRITE instruction is executed, EWEN instruction must be executed. The ERASE/WRITE enable state continues until EWDS instruction is executed or Vcc is removed from the part. Execution of a read instruction is independent of both EWEN and EWDS instructions. Busy/Ready status signal After a write instruction, the DO output serves as a Busy/Ready status indicator. After the falling edge of the CS initiates the self-timed programming cycle, the DO indicates the Busy/Ready status of the chip if the CS is brought high after a minimum of 250ns Tcs . DO=logical "0" indicates that programming is still in progress. DO=logical "1" indicates that the register at the address specified in the instruction has been written with the new data pattern contained in the instruction and the part is ready for a next instruction. The Busy/Ready status indicator is only valid when CS is active high . When CS is low, the DO output goes into a high impedance state. The Busy/Ready signal outputs until a start bit Logic"1" of the next instruction is given to the part. Type of Products Model AK93C85AF AK93C85AM AK93C95AF AK93C10AF Memory size 16Kbits 32Kbits 64Kbits Temp.Range Package 8pin Plastic SOP 8pin Plastic SSOP 8pin Plastic SOP 8pin Plastic SOP DAM02E-01 -2- 1999/10

PDF Datasheet Preview

ASAHI KASEI
[AK93C85A/95A/10A]

AK93C85A / 95A / 10A
16K / 32K / 64Kbit Serial CMOS EEPROM

ADVANCED CMOS EEPROM TECHNOLOGY

READ/WRITE NON-VOLATILE MEMORY

WIDE VCC OPERATION Vcc = 1.8V 5.5V

AK93C85A 16384 bits, 1024 16 organization

AK93C95A 32768 bits, 2048 16 organization

AK93C10A 65536 bits, 4096 16 organization

SERIAL INTERFACE
- Interfaces with popular microcontrollers and standard microprocessors

LOW POWER CONSUMPTION
- 0.4mA max. Read Operation
- Max. Standby

HIGH RELIABILITY
-Endurance
100K cycles
-Data Retention 10 years

Automatic address increment READ

Automatic write cycle time-out with auto-ERASE Max. 8ms VCC=4.5V 5.5V

Busy/Ready status signal

Software controlled write protection

IDEAL FOR LOW DENSITY DATA STORAGE
- Low cost, space saving, 8-pin package

DAM02E-01

Block Diagram -1-
1999/10

ASAHI KASEI
[AK93C85A/95A/10A]

General Description The AK93C85A/95A/10A is a 16384/32768/65536-bit serial CMOS EEPROM divided into 1024/2048/4096 registers of 16 bits each. The AK93C85A/95A/10A has 4 instructions such as READ, WRITE, EWEN and EWDS. Those instructions control the AK93C85A/95A/10A. The AK93C85A/95A/10A can operate full function under wide operating voltage range from 1.8V to 5.5V. The charge up circuit is integrated for high voltage generation that is used for write operation. A serial interface of AK93C85A/95A/10A, consisting of chip select CS , serial clock SK , data-in DI and data-out DO , can easily be controlled by popular microcontrollers or standard microprocessors. AK93C85A/95A/10A takes in the write data from data input pin DI to a register synchronously with rising edge of input pulse of serial clock pin SK . And at read operation, AK93C85A/95A/10A takes out the read data from a register to data output pin DO synchronously with rising edge of SK. The DO pin is usually in high impedance state. The DO pin outputs "L" or "H" in case of data output or Busy/Ready signal output.

Software controlled write protection When Vcc is applied to the part, the part automatically powers up in the ERASE/WRITE Disable state. In the ERASE/WRITE disable state, execution of WRITE instruction is disabled. Before WRITE instruction is executed, EWEN instruction must be executed. The ERASE/WRITE enable state continues until EWDS instruction is executed or Vcc is removed from the part. Execution of a read instruction is independent of both EWEN and EWDS instructions.

Busy/Ready status signal After a write instruction, the DO output serves as a Busy/Ready status indicator. After the falling edge of the CS initiates the self-timed programming cycle, the DO indicates the Busy/Ready status of the chip if the CS is brought high after a minimum of 250ns Tcs . DO=logical "0" indicates that programming is still in progress. DO=logical "1" indicates that the register at the address specified in the instruction has been written with the new data pattern contained in the instruction and the part is ready for a next instruction. The Busy/Ready status indicator is only valid when CS is active high . When CS is low, the DO output goes into a high impedance state. The Busy/Ready signal outputs until a start bit Logic"1" of the next instruction is given to the part.

Type of Products

Model AK93C85AF AK93C85AM AK93C95AF AK93C10AF

Memory size 16Kbits
32Kbits 64Kbits

Temp.Range

Package 8pin Plastic SOP 8pin Plastic SSOP 8pin Plastic SOP 8pin Plastic SOP

DAM02E-01 -2-
1999/10

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived AK93C10AF Datasheet file may be downloaded here without warranties.

Datasheet ID: AK93C10AF 515936