AK93C41AV

AK93C41AV Datasheet

[AK93C41A/51A/61A]

Part	Datasheet
AK93C41AV	AK93C41AV (pdf)

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ASAHI KASEI [AK93C41A/51A/61A] AK93C41A / 51A / 61A 0.9V operation 1K / 2K / 4Kbit Serial CMOS EEPROM ADVANCED CMOS EEPROM TECHNOLOGY LOW VCC OPERATION ∙∙∙ Vcc = 0.9V ~ 3.6V AK93C41A x 1024 bits, 64x16 organization AK93C51A x 2048 bits, 128x16 organization AK93C61A x 4096 bits, 256x16 organization SERIAL INTERFACE - Interfaces with popular microcontrollers and standard microprocessors LOW POWER CONSUMPTION - 2µA Max. Standby VCC=3.6V Automatic address increment READ Automatic write cycle time-out with auto-ERASE Busy/Ready status signal Software controlled write protection Hardware write protect for lower block AK93C51A/61A only IDEAL FOR LOW DENSITY DATA STORAGE - Low cost, space saving, 8-pin package TSSOP INSTRUCTION REGISTER CS SK PROTECT AK93C51A/61A only DAM05E-01 INSTRUCTION DECODE, CONTROL AND CLOCK GENERATION DATA REGISTER ADD. BUFFERS R/W AMPS AND AUTO ERASE DECODER EEPROM 93C41A=1024bit 93C51A=2048bit 93C61A=4096bit VPP SW VREF Block Diagram -1- VPP GENERATOR 2001/02 ASAHI KASEI [AK93C41A/51A/61A] The AK93C41A/51A/61A is a 1024/2048/4096-bit serial CMOS EEPROM divided into 64/128/256 registers of 16 bits each. The AK93C41A/51A/61A has 4 instructions such as READ, WRITE, EWEN and EWDS. Those instructions control the AK93C41A/51A/61A. The AK93C41A/51A/61A can operate full function under wide operating voltage range from 0.9V to 3.6V. The charge up circuit is integrated for high voltage generation that is used for write operation. A serial interface of AK93C41A/51A/61A, consisting of chip select CS , serial clock SK , data-in DI and data-out DO , can easily be controlled by popular microcontrollers or standard microprocessors. AK93C41A/51A/61A takes in the write data from data input pin DI to a register synchronously with rising edge of input pulse of serial clock pin SK . And at read operation, AK93C41A/51A/61A takes out the read data from a register to data output pin DO synchronously with rising edge of SK. The DO pin is usually in high impedance state. The DO pin outputs "L" or "H" in case of data output or Busy/Ready signal output.

PDF Datasheet Preview

ASAHI KASEI
[AK93C41A/51A/61A]

AK93C41A / 51A / 61A
0.9V operation 1K / 2K / 4Kbit Serial CMOS EEPROM

ADVANCED CMOS EEPROM TECHNOLOGY LOW VCC OPERATION ∙∙∙ Vcc = 0.9V ~ 3.6V

AK93C41A x 1024 bits, 64x16 organization

AK93C51A x 2048 bits, 128x16 organization

AK93C61A x 4096 bits, 256x16 organization

SERIAL INTERFACE
- Interfaces with popular microcontrollers and standard microprocessors

LOW POWER CONSUMPTION
- 2µA Max. Standby VCC=3.6V

Automatic address increment READ

Automatic write cycle time-out with auto-ERASE

Busy/Ready status signal

Software controlled write protection

Hardware write protect for lower block AK93C51A/61A only

IDEAL FOR LOW DENSITY DATA STORAGE
- Low cost, space saving, 8-pin package TSSOP

INSTRUCTION

REGISTER

CS SK PROTECT

AK93C51A/61A only

DAM05E-01

INSTRUCTION DECODE, CONTROL AND CLOCK

GENERATION

DATA REGISTER

ADD. BUFFERS

R/W AMPS AND

AUTO ERASE

DECODER

EEPROM
93C41A=1024bit 93C51A=2048bit 93C61A=4096bit

VPP SW

VREF

Block Diagram -1-

VPP GENERATOR
2001/02

ASAHI KASEI
[AK93C41A/51A/61A]

The AK93C41A/51A/61A is a 1024/2048/4096-bit serial CMOS EEPROM divided into 64/128/256 registers of 16 bits each. The AK93C41A/51A/61A has 4 instructions such as READ, WRITE, EWEN and EWDS. Those instructions control the AK93C41A/51A/61A. The AK93C41A/51A/61A can operate full function under wide operating voltage range from 0.9V to 3.6V. The charge up circuit is integrated for high voltage generation that is used for write operation. A serial interface of AK93C41A/51A/61A, consisting of chip select CS , serial clock SK , data-in DI and data-out DO , can easily be controlled by popular microcontrollers or standard microprocessors. AK93C41A/51A/61A takes in the write data from data input pin DI to a register synchronously with rising edge of input pulse of serial clock pin SK . And at read operation, AK93C41A/51A/61A takes out the read data from a register to data output pin DO synchronously with rising edge of SK. The DO pin is usually in high impedance state. The DO pin outputs "L" or "H" in case of data output or Busy/Ready signal output.

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Datasheet ID: AK93C41AV 515932