ACT8896 Rev 1, 06-Sep-13
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ACT8896Q4I133-T (pdf) |
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EA8896 |
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Advanced PMU for Samsung S3C6410 • Optimized for Samsung S3C6410 Processor • Three Step-Down DC/DC Converters • Four Low-Dropout Linear Regulators • I2CTM Serial Interface • Advanced Enable/Disable Sequencing Controller • Minimal External Components • Tiny 4x4mm TQFN44-32 Package − 0.75mm Package Height − Pb-Free and RoHS Compliant The ACT8896 is a complete, cost effective, highlyefficient ActivePMUTM power management solution, optimized for the unique power, voltagesequencing, and control requirements of the Samsung S3C6410 processor. This device features three step-down DC/DC converters and four low-noise, low-dropout linear regulators. The three DC/DC converters utilize a highefficiency, fixed-frequency 2MHz , current-mode PWM control architecture that requires a minimum number of external components. Two DC/DCs are capable of supplying up to 900mA of output current, while the third supports up to 700mA. All four lowdropout linear regulators are high-performance, low-noise, regulators that supply up to 150mA, 150mA, 250mA, and 250mA, respectively. The ACT8896 is available in a compact, Pb-Free and RoHS-compliant TQFN44-32 package. TYPICAL APPLICATION DIAGRAM Innovative PowerTM Active-Semi Authorized Recipients and Customers ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of NXP. Copyright 2013 Active-Semi, Inc. TABLE OF CONTENTS General Information 01 Functional Block 03 Ordering 04 Pin Configuration 04 Pin 05 Absolute Maximum Ratings 07 I2C Interface Electrical Characteristics 08 Global Register Map 09 Register and Bit Descriptions 10 System Control Electrical 13 Step-Down DC/DC Electrical Characteristics 14 Low-Noise LDO Electrical 15 Typical Performance 16 System control information 21 Interfacing with the Samsung 21 Control Signals 22 Push-Button 23 Control 23 Functional Description 25 I2C Interface 25 Voltage Monitor and Interrupt 25 Thermal Shutdown 25 Step-Down DC/DC Regulators 26 General 26 100% Duty Cycle 26 Synchronous 26 Soft-Start 26 Compensation 26 Configuration 26 OK[ ] and Output Fault 27 PCB Layout Considerations 27 Low-Noise, Low-Dropout Linear 28 General 28 Output Current Limit 28 Compensation 28 Configuration 28 OK[ ] and Output Fault 28 PCB Layout Considerations 28 TQFN44-32 Package Outline and Dimensions 30 Innovative PowerTM Active-Semi Authorized Recipients and Customers ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of NXP. Copyright 2013 Active-Semi, Inc. FUNCTIONAL BLOCK DIAGRAM Innovative PowerTM Active-Semi Authorized Recipients and Customers ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of NXP. Copyright 2013 Active-Semi, Inc. ORDERING INFORMATION VOUT1/VSTBY1 VOUT2/VSTBY2 VOUT3/VSTBY3 VOUT4 VOUT5 VOUT6 VOUT7 PACKAGE PINS TEMPERATURE RANGE ACT8896Q4I133-T 3.3V/3.3V 1.3V/1.3V 1.3V/1.3V 1.2V 1.2V 1.2V 3.3V TQFN44-32 -40°C to +85°C All Active-Semi components are RoHS Compliant and with Pb-free plating unless specified differently. The term Pb-free means semiconductor products that are in compliance with current RoHS Restriction of Hazardous Substances standards. Standard product options are identified in this table. Contact factory for custom options, minimum order quantity is 12,000 units. To select VSTBYx as a output regulation voltage of REGx, drive VSEL to a logic high. The VSTBYx can be set by software via I2C interface, refer to appropriate sections of this datasheet for VSTBYx setting. PIN CONFIGURATION TOP VIEW REFBP VP1 SW1 GP1 GP2 SW2 VP2 NC2 nPBIN PWRHLD nRSTO nIRQ nPBSTAT GP3 SW3 VP3 Thin - QFN TQFN44-32 Innovative PowerTM Active-Semi Authorized Recipients and Customers ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of NXP. Copyright 2013 Active-Semi, Inc. PIN DESCRIPTIONS PIN NAME OUT1 Output Feedback Sense for REG1. Connect this pin directly to the output node to connect the internal feedback network to the output voltage. Analog Ground. Connect GA directly to a quiet ground node. Connect GA, GP1,GP2 and GP3 together at a single point as close to the IC as possible. Output Voltage for REG4. Capable of delivering up to 150mA of output current. Connect a 1.5µF OUT4 ceramic capacitor from OUT4 to GA. The output is discharged to GA with resistor when disabled. Output Voltage for REG5. Capable of delivering up to 150mA of output current. Connect a 1.5µF OUT5 ceramic capacitor from OUT5 to GA. The output is discharged to GA with resistor when disabled. INL45 Power Input for REG4 and REG5. Bypass to GA with a high quality ceramic capacitor placed as close to the IC as possible. INL67 Power Input for REG6 and REG7. Bypass to GA with a high quality ceramic capacitor placed as close to the IC as possible. Output Voltage for REG6. Capable of delivering up to 250mA of output current. Connect a 2.2µF OUT6 ceramic capacitor from OUT6 to GA. The output is discharged to GA with resistor when disabled. Output Voltage for REG7. Capable of delivering up to 250mA of output current. Connect a 2.2µF OUT7 ceramic capacitor from OUT7 to GA. The output is discharged to GA with resistor when VNOM refers to the nominal output voltage level for VOUT as defined by the Ordering Information section. 2 IMAX Maximum Output Current. MAX 90 1% 2% UNIT V mV µA µA %/V %/mA %VNOM %VNOM MHz kHz µs ns A µA A µA A µA Innovative PowerTM - 14 - Active-Semi Authorized Recipients and Customers ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of NXP. Copyright 2013 Active-Semi, Inc. LOW-NOISE LDO ELECTRICAL CHARACTERISTICS VINL = 3.6V, COUT4 = COUT5 = 1.5µF, COUT6 = COUT7 = 2.2µF, LOWIQ[ ] = [0], TA = 25°C, unless otherwise specified. PARAMETER TEST CONDITIONS MIN TYP MAX Operating Voltage Range Output Voltage Accuracy Line Regulation Load Regulation Power Supply Rejection Ratio VOUT 1.2V, TA = 25°C, IOUT = 10mA VOUT < 1.2V, TA = 25°C, IOUT = 10mA VINL = Max VOUT + 0.5V, 3.6V to 5.5V LOWIQ[ ] = [0] VINL = Max VOUT + 0.5V, 3.6V to 5.5V LOWIQ[ ] = [1] IOUT = 1mA to IMAX2 f = 1kHz, IOUT = 20mA, VOUT =1.2V f = 10kHz, IOUT = 20mA, VOUT =1.2V Regulator Enabled, LOWIQ[ ] = [0] VNOM VNOM Supply Current per Output Regulator Enabled, LOWIQ[ ] = [1] Regulator Disabled Soft-Start Period VOUT = 2.9V Power Good Threshold VOUT Rising Power Good Hysteresis VOUT Falling Output Noise IOUT = 20mA, f = 10Hz to 100kHz, VOUT = 1.2V Discharge Resistance LDO Disabled, DIS[ ] = 1 REG4 VNOM refers to the nominal output voltage level for VOUT as defined by the Ordering Information section. 2 IMAX Maximum Output Current. 3 Dropout Voltage is defined as the differential voltage between input and output when the output voltage drops 100mV below the regulation voltage for 3.1V output voltage or higher LDO current limit is defined as the output current at which the output voltage drops to 95% of the respective regulation voltage. Under heavy overload conditions the output current limit folds back by 30% typ Innovative PowerTM - 15 - Active-Semi Authorized Recipients and Customers ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of NXP. Copyright 2013 Active-Semi, Inc. TYPICAL PERFORMANCE CHARACTERISTICS VVP1 = VVP2 = VVP3 = 3.6V, TA = 25°C, unless otherwise specified. ACT8896-002 VREF % Frequency % VREF vs. Temperature -40 -20 Typical VREF=1.2V 0 20 40 60 80 100 120 Temperature °C ACT8896-001 -1 -40 Frequency vs. Temperature Typical Oscillator Frequency=2MHz 60 80 85 Temperature °C ACT8896-004 nPBIN Startup Sequence CH5 CH1 VnPBIN, 5V/div CH2 VOUT1, 2V/div CH3 VOUT5, 1V/div CH4 VOUT6, 1V/div CH5 VOUT7, 2V/div TIME 400us/div ACT8896-003 PWRHLD Startup Sequence CH2 CH3 CH5 CH1 VPWRHLD, 5V/div CH2 VOUT1, 2V/div CH3 VOUT5, 1V/div CH4 VOUT6, 1V/div CH5 VOUT7, 2V/div TIME 400us/div PWREN Sequence CH4 CH1 VPWREN, 2V/div CH2 VOUT2, 1V/div CH3 VOUT3, 1V/div CH4 VOUT4, 1V/div TIME 2ms/div Innovative PowerTM - 16 - Active-Semi Authorized Recipients and Customers ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of NXP. ACT8896-005 Copyright 2013 Active-Semi, Inc. TYPICAL PERFORMANCE CHARACTERISTICS CONT’D |
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