ACT8810QJ3EB-T

ACT8810QJ3EB-T Datasheet


ACT8810 Rev 9, 15-Nov-12

Part Datasheet
ACT8810QJ3EB-T ACT8810QJ3EB-T ACT8810QJ3EB-T (pdf)
Related Parts Information
EA8810 EA8810 EA8810
ACT8810QJ213-T ACT8810QJ213-T ACT8810QJ213-T
ACT8810QJ50F-T ACT8810QJ50F-T ACT8810QJ50F-T
ACT8810QJ1C1-T ACT8810QJ1C1-T ACT8810QJ1C1-T
ACT8810QJ420-T ACT8810QJ420-T ACT8810QJ420-T
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Eight Channel ActivePathTM Power Management IC
• ActivePathTM Li+ Charger with System Power

Selection
• Six Integrated Regulators
− 1.3A High Efficiency Step-Down DC/DC − 1.0A High Efficiency Step-Down DC/DC − 0.55A High Efficiency Step-Down DC/DC − 2x360mA Low Noise, High PSRR LDOs − 30mA RTC LDO / Backup Battery Charger
• I2CTM Serial Interface
• Minimal External Components
• Compatible with USB or AC-Adapter

Charging
• 5mm x 5mm, Thin-QFN TQFN55-40 Package
− Only 0.75mm Height − RoHS Compliant
• Personal Navigation Devices
• Portable Media Players
• Smart Phones

The patent-pending ACT8810 is a complete, cost effective, highly-efficient ActivePMUTM power management solution that is ideal for a wide range of high performance portable handheld applications such as personal navigation devices PNDs . This device integrates the ActivePathTM complete battery charging and management system with six power supply channels.

The ActivePath architecture automatically selects the best available input supply for the system. If the external input source is not present or the system load current is more than the input source can provide, the ActivePath supplies additional current from the battery to the system. The charger is a complete, thermallyregulated, stand-alone single-cell linear Li+ charger that incorporates an internal power MOSFET.

REG1, REG2, and REG3 are three independent, fixed-frequency, current-mode step-down DC/DC converters that output 1.3A, 1.0A, and 0.55A, respectively. REG4 and REG5 are high performance, low-noise, low-dropout linear regulators that output up to 360mA each. REG6 is a RTC LDO that outputs up to 30mA for a real time clock. Finally, an I2C serial interface provides programmability for the DC/DC converters and LDOs.

The ACT8810 is available in a tiny 5mm x 5mm 40pin Thin-QFN package that is just 0.75mm thin.

SYSTEM BLOCK DIAGRAM

CHG_IN CHGLEV

DCCC ISET ACIN
nSTAT0 nSTAT1

TH BTR
nPBIN nIRQ
nRSTO SCL SDA ON1 ON2 ON3

VSEL

ActivePathTM &

Single-Cell Li+ Battery Charger

System Control

ACT8810 ActivePMU TM

Innovative PowerTM

ActivePMUTM and ActivePathTM are trademarks of Active-Semi.

I2CTM is a trademark of NXP.

REG1 Step-Down

DC/DC

REG2 Step-Down

DC/DC

REG3 Step-Down

DC/DC

REG4 LDO

REG5 LDO

REG6 RTC_LDO

Battery Programmable Up to 1A VSYS

OUT1 Adjustable, or 0.8V to 4.4V Up to 1.3A

OUT2 Adjustable, or 0.8V to 4.4V Up to 1.0A
Functional Block Diagram p. 03 Ordering Information p. 04 Pin p. 04 Pin Descriptions p. 05 Absolute Maximum p. 07

SYSTEM MANAGEMENT 08

Register Descriptions p. 08 I2C Interface Electrical Characteristics p. 09 Electrical Characteristics p. 10 Register Descriptions p. 11 Typical Performance p. 12 Functional p. 13

STEP-DOWN DC/DC CONVERTERS 17

Electrical Characteristics p. 17 Typical Performance p. 20 Register Descriptions p. 22 Functional p. 28

LOW-DROPOUT LINEAR REGULATORS 31

Electrical Characteristics p. 31 Typical Performance p. 33 Register Descriptions p. 34 Functional p. 36

RTC LOW-DROPOUT LINEAR REGULATOR 37

Electrical Characteristics p. 37 Register Descriptions p. 38 Functional p. 39

ActivePathTM CHARGER 40

Electrical Characteristics p. 40 Typical Performance p. 42 Functional p. 44

PACKAGE 53

Innovative PowerTM

ActivePMUTM and ActivePathTM are trademarks of Active-Semi.

I2CTM is a trademark of NXP.

Copyright 2012 Active-Semi, Inc.

FUNCTIONAL BLOCK DIAGRAM

REG1

REG2

REG3

Innovative PowerTM

ActivePMUTM and ActivePathTM are trademarks of Active-Semi.

I2CTM is a trademark of NXP.

Copyright 2012 Active-Semi, Inc.
ORDERING INFORMATION

VOUT1/VSTBY1 VOUT2/VSTBY2 VOUT3/VSTBY3 VOUT4 VOUT5 VOUT6 CONTROL SEQUENCE

ACT8810QJ1C1-T 3.3V/3.3V 1.1V/1.2V 1.2V/1.2V 1.2V 2.8V 3.3V

Sequence A

ACT8810QJ213-T 1.2V/1.2V 1.8V/1.8V 1.0V/1.0V 3.3V 1.2V 3.0V

Sequence B

ACT8810QJ3EB-T 3.3V/3.3V 1.2V/1.2V 1.8V/1.8V 1.5V 2.8V 3.3V

Sequence C

ACT8810QJ420-T 3.3V/3.3V 1.8V/1.8V 1.1V/1.2V 1.2V 3.3V 2.5V

Sequence D

ACT8810QJ50F-T 1.2V/1.2V 3.3V/3.3V 1.8V/1.8V 3.3V 1.8V 3.0V

Sequence E

PACKAGING DETAILS

ACT8810QJ###-T

PACKAGE

TQFN55-40

PINS

TEMPERATURE RANGE
-40°C to +85°C

PACKING

TAPE & REEL

All Active-Semi components are RoHS Compliant and with Pb-free plating unless specified differently. The term Pb-free means semiconductor products that are in compliance with current RoHS Restriction of Hazardous Substances standards.

To select VSTBYx as a output regulation voltage of REGx, tie VSEL to VSYS or a logic high.

Refer to the Control Sequence section for more information.

PIN CONFIGURATION

TOP VIEW

INL OUT4 nSTAT0

ON2 GA

REFBP nSTAT1 nRSTO
nIRQ CHGLEV

TH DCCC

BTR ACIN BAT VSYS CHG_IN ISET

ACT8810

OUT5 OUT6 VP3 SW3 GP3 OUT3 nPBIN SDA SCL ON3

OUT1 VP1 SW1 GP1 GP2 SW2 VP2 OUT2 ON1 VSEL

Thin - QFN TQFN55-40

Innovative PowerTM

ActivePMUTM and ActivePathTM are trademarks of Active-Semi.

I2CTM is a trademark of NXP.

Copyright 2012 Active-Semi, Inc.

PIN DESCRIPTIONS
VNOM1 refers to the nominal output voltage level for VOUT1 as defined by the Ordering Information section.

Innovative PowerTM ActivePMUTM and ActivePathTM are trademarks of Active-Semi. I2CTM is a trademark of NXP.
- 17 -

Copyright 2012 Active-Semi, Inc.

STEP-DOWN DC/DC CONVERTERS

ELECTRICAL CHARACTERISTICS REG2

VVSYS = 3.6V, TA = 25°C, unless otherwise specified.

PARAMETER

TEST CONDITIONS

VP2 Operating Voltage Range

VP2 UVLO Threshold

Input Voltage Rising

VP2 UVLO Hysteresis

Input Voltage Falling

Quiescent Supply Current

Shutdown Supply Current

REG2 Disabled, VVP2 = 4.2V

VNOM2 < 1.5V, IOUT2 = 10mA Output Voltage Regulation Accuracy

VNOM2 1.5V, IOUT2 = 10mA

Line Regulation

VVP2 = Max VNOM2 + 1V, 3.2V to 5.5V

Load Regulation

IOUT2 = 10mA to 1.0A

Current Limit

Oscillator Frequency

PMOS On-Resistance NMOS On-Resistance SW2 Leakage Current Power Good Threshold

VOUT2 20% of VNOM2 VOUT2 = 0V ISW2 = -100mA ISW2 = 100mA VVP2 = 5.5V, VSW2 = 5.5V or 0V

Minimum On-Time
85 130 VNOM2 540
94 60
200 1

UNIT

V mV µA µA
%/V %/mA

A MHz kHz
µA %VNOM2 ns
VNOM2 refers to the nominal output voltage level for VOUT2 as defined by the Ordering Information section.

Innovative PowerTM ActivePMUTM and ActivePathTM are trademarks of Active-Semi. I2CTM is a trademark of NXP.
- 18 -

Copyright 2012 Active-Semi, Inc.

STEP-DOWN DC/DC CONVERTERS

ELECTRICAL CHARACTERISTICS REG3

VVSYS = 3.6V, TA = 25°C, unless otherwise specified.

PARAMETER

TEST CONDITIONS

VP3 Operating Voltage Range

VP3 UVLO Threshold

Input Voltage Rising

VP3 UVLO Hysteresis

Input Voltage Falling

Quiescent Supply Current

Shutdown Supply Current

REG3 Disabled, VVP3 = 4.2V

VNOM3 < 1.5V, IOUT3 = 10mA Output Voltage Regulation Accuracy

VNOM3 1.5V, IOUT3 = 10mA

Line Regulation

VVP3 = Max VNOM3 + 1V, 3.2V to 5.5V

Load Regulation

IOUT3 = 10mA to 550mA

Current Limit

Oscillator Frequency

PMOS On-Resistance NMOS On-Resistance SW3 Leakage Current

VOUT3 20% of VNOM3 VOUT3 = 0V ISW3 = -100mA ISW3 = 100mA VVP3 = 5.5V, VSW3 = 5.5V or 0V

Power Good Threshold

Minimum On-Time
85 130 VNOM3 540
94 60
200 1

UNIT

V mV µA µA
%/V %/mA

A MHz kHz
µA %VNOM3 ns
VNOM3 refers to the nominal output voltage level for VOUT3 as defined by the Ordering Information section.

Innovative PowerTM ActivePMUTM and ActivePathTM are trademarks of Active-Semi. I2CTM is a trademark of NXP.
- 19 -

Copyright 2012 Active-Semi, Inc.

STEP-DOWN DC/DC CONVERTERS

TYPICAL PERFORMANCE CHARACTERISTICS

ACT8810QJ3EB, VVP1 = VVP2 = 3.6V, L = 3.3µH, CVP1 = CVP2 = 4.7uF, COUT1 = 22µF, COUT2 = 10uF, TA = 25°C, unless otherwise specified.

ACT8810-004

REG1 Efficiency %

REG1 Efficiency vs. Load Current
100 VVSYS = 3.6V

VVSYS = 5.2V

VVSYS = 4.6V

VVSYS = 4.2V 60

VOUT1 = 3.3V
2000

Load Current mA

ACT8810-003

REG2 Efficiency %

REG2 Efficiency vs. Load Current

VVSYS = 3.6V 80

VVSYS = 5.2V

VVSYS = 4.6V

VVSYS = 4.2V

VOUT2 = 1.2V
1000

Load Current mA

OUT2 Regulation Voltage V

ACT8810-006

OUT1 Regulation Voltage vs. Temperature

IOUT1 = 35mA

Temperature °C

ACT8810-005

OUT3 Regulation Voltage V

OUT2 Regulation Voltage vs. Temperature

IOUT2 = 35mA

Temperature °C

ACT8810-007

REG1 RDSON

REG1 RDSON vs. VP1 Input Voltage

PMOS
By default, REG1, REG2 and REG3 each power up and regulate to their default output voltage, as defined in the Ordering Information section. Once the system is enabled, each regulator’s output voltage may be modified through either the I2C interface or the Voltage Selection VSEL pin.

Programming via the I2C Interface

Following startup, REG1, REG2, and REG3 may be independently programmed to different values by writing to the REGx/VSETx[_] and REGx/VRANGE[_] registers via the I2C interface. To program each regulator, first select the desired output voltage range via the REGx/VRANGE[ ] bit. Each regulator supports two overlapping ranges set REGx/VRANGE[_] to 0 for voltages below 2.245V, set REGx/VRANGE[_] to 1 for voltages above 1.25V.

Once the desired range has been selected, program the output to a voltage within that range by setting the REGx/VSETx bits. For more information about the output voltage setting options, refer to Tables 4, 7, and 10, for REG1, REG2, and REG3, respectively.

Programming with Adjustable Option

Figure 8 shows the feedback network necessary to set the output voltage when using the adjustable output voltage option. Select components as follows Set RFB2 = then calculate RFB1 using the following equation:

R FB1

VOUTx VFBx

Where VFBx is 0.625V when REGx x VRANGE[ ] = 0 and 1.25V when REGx x VRANGE[ ] = 1

When using Adjustable Option, OUTx pins works as FBx function.

Output Voltage Selection Pin VSEL

ACT8810's VSEL pin provides a simple means of alternating between two preset output voltage settings, such as may be needed for dynamic voltage selection DVS . The operation of this pin is as follows when VSEL is driven to GA or a logic low, the output voltages of REG1, REG2, and REG3 are each defined by their VSET0[ ] register. when VSEL is driven to VSYS or a logic high, the output voltages of REG1, REG2, and REG3 are each defined by their VSET1[ ] register.
By default, each regulator's VSET0[ ] and VSET1[ ] registers are both programmed to the same voltage, as defined in the Ordering Information section. As a result, toggling VSET under default conditions has no affect. However, by re-programming one or more regulator's VSET0[ ] and/or VSET1[ ] registers, one can easily toggle these regulators' output voltages between two sets of voltages, such as to implement 'normal' and 'standby' modes in a system utilizing the ACT8810 to implement an advanced power management architecture.

PCB Layout Considerations

High switching frequencies and large peak currents make PC board layout an important part of stepdown DC/DC converter design. A good design minimizes excessive EMI on the feedback paths and voltage gradients in the ground plane, both of which can result in instability or regulation errors.

Step-down DC/DCs exhibit discontinuous input current, so the input capacitors should be placed as

Innovative PowerTM ActivePMUTM and ActivePathTM are trademarks of Active-Semi. I2CTM is a trademark of NXP.
- 29 -

Copyright 2012 Active-Semi, Inc.

STEP-DOWN DC/DC CONVERTERS

FUNCTIONAL DESCRIPTION CONT’D
close as possible to the IC, and avoiding the use of vias if possible. The inductor, input filter capacitor, and output filter capacitor should be connected as close together as possible, with short, direct, and wide traces. The ground nodes for each regulator’s power loop should be connected at a single point in a starground configuration, and this point should be connected to the backside ground plane with multiple vias. The output node for each regulator should be connected to its corresponding OUTx pin through the shortest possible route, while keeping sufficient distance from switching nodes to prevent noise injection. Finally, the exposed pad should be directly connected to the backside ground plane using multiple vias to achieve low electrical and thermal resistance.

Innovative PowerTM ActivePMUTM and ActivePathTM are trademarks of Active-Semi. I2CTM is a trademark of NXP.
- 30 -

Copyright 2012 Active-Semi, Inc.

LOW-DROPOUT LINEAR REGULATORS

ELECTRICAL CHARACTERISTICS REG4

VINL = 3.6V, COUT4 = 1µF, TA = 25°C, unless otherwise specified.

PARAMETER

TEST CONDITIONS

INL Operating Voltage Range

INL UVLO Threshold UVLO Hysteresis Output Voltage Accuracy Line Regulation Error Load Regulation Error Power Supply Rejection Ratio

Supply Current per Output Dropout Voltage3 Output Current

VINL Input Rising VINL Input Falling TA = 25°C TA = -40°C to 85°C VINL = Max VOUT5 + 0.5V, 3.6V to 5.5V IOUT5 = 1mA to 360mA f = 1kHz, IOUT4 = 360mA, COUT4 = 1µF = 10kHz, IOUT4 = 360mA, COUT4 = 1µF Regulator Enabled Regulator Disabled IOUT4 = 160mA, VOUT4 > 3.1V

Current Limit Internal Soft-Start

VOUT4 = 95% of regulation voltage

Power Good Flag High Threshold VOUT4, hysteresis = -2%

Output Noise

COUT4 = 10µF, f = 10Hz to 100kHz

Stable COUT4 Range

Discharge Resistor in Shutdown LDO Disabled, DIS4[ ] = [1]
-2% -3%

VNOM4 0 70 60 35 0 100
100 88 40
1000
+2% +3%
200 360

UNIT
%/V mV/mA
µs % µVRMS µF
VNOM4 refers to the nominal output voltage level for VOUT4 as defined by the Ordering Information section.

PSRR is lower with VSET < 1.25V
3 Dropout Voltage is defined as the differential voltage between input and output when the output voltage drops 100mV below the regulation voltage at 1V differential voltage for 2.8V output voltage or higher

LDO current limit is defined as the output current at which the output voltage drops to 95% of the respective regulation voltage. Under heavy overload conditions the output current limit folds back by 40% typ

Innovative PowerTM ActivePMUTM and ActivePathTM are trademarks of Active-Semi. I2CTM is a trademark of NXP.
- 31 -

Copyright 2012 Active-Semi, Inc.

LOW-DROPOUT LINEAR REGULATORS

ELECTRICAL CHARACTERISTICS REG5

VINL = 3.6V, COUT5 = 1µF, TA = 25°C, unless otherwise specified.

PARAMETER

INL Operating Voltage Range INL UVLO Threshold UVLO Hysteresis

Output Voltage Accuracy

Line Regulation Error Load Regulation Error

Power Supply Rejection Ratio

Supply Current per Output

Dropout Voltage3 Output Current Limit Internal Soft-Start Output Noise Stable COUT5 Range Discharge Resistor in Shutdown

TEST CONDITIONS

VINL Input Rising VINL Input Falling TA = 25°C TA = -40°C to 85°C VINL = Max VOUT5 + 0.5V, 3.6V to 5.5V IOUT5 = 1mA to 360mA f = 1kHz, IOUT5 = 360mA, COUT5 = 1µF = 10kHz, IOUT5 = 360mA, COUT5 = 1µF Regulator Enabled Regulator Disabled IOUT5 = 160mA, VOUT5 > 3.1V

VOUT5 = 95% of regulation voltage

COUT5 = 10µF, f = 10Hz to 100kHz

LDO Disabled, DIS5[ ] = [1]
-2% -3%
400 1

VNOM5 0 70 60 35 0 100
100 40
1000

MAX UNIT

V +3%
mV/mA
200 mV
360 mA
µVRMS
VNOM5 refers to the nominal output voltage level for VOUT5 as defined by the Ordering Information section.

PSRR is lower with VSET < 1.25V
3 Dropout Voltage is defined as the differential voltage between input and output when the output voltage drops 100mV below the regulation voltage at 1V differential voltage for 2.8V output voltage or higher

LDO current limit is defined as the output current at which the output voltage drops to 95% of the respective regulation voltage. Under heavy overload conditions the output current limit folds back by 40% typ

Innovative PowerTM ActivePMUTM and ActivePathTM are trademarks of Active-Semi. I2CTM is a trademark of NXP.
- 32 -

Copyright 2012 Active-Semi, Inc.

LOW-DROPOUT LINEAR REGULATORS

TYPICAL PERFORMANCE CHARACTERISTICS

ACT8810QJ3EB, VVSYS = 5V, TA = 25°C, unless otherwise specified.

Output Regulation Voltage %

ACT8810-013

Output Regulation Voltage vs. Load Current
40 80 120 160 200 240 280 320 360

Load Current mA

ACT8810-012

Dropout Voltage mV

Dropout Voltage vs. Output Current
150 REG4, REG5
75 50
3.1V 3.3V 3.6V
50 100 150 200 250 300 360

Output Current mA

Output Voltage Deviation %

ACT8810-015

Output Voltage Deviation vs. Temperature

ILOAD = 0mA

Temperature °C

ACT8810-014

LDO Output Voltage Noise

CH1 VOUTx, 200µV/div AC COUPLED TIME 200ms/div

CREF = 10nF

Region of Stable COUT ESR vs. Output Current

ACT8810-016

Stable ESR
50 100 150 200 250 300 360

Output Current mA

Innovative PowerTM ActivePMUTM and ActivePathTM are trademarks of Active-Semi. I2CTM is a trademark of NXP.
- 33 -

Copyright 2012 Active-Semi, Inc.

LOW-DROPOUT LINEAR REGULATORS
VNOM6 refers to the nominal output voltage level for VOUT6 as defined by the Ordering Information section.

Dropout Voltage is defined as the differential voltage between input and output when the output voltage drops 100mV below the regulation voltage at 1V differential voltage for 2.8V output voltage or higher
3 LDO current limit is defined as the output current at which the output voltage drops to 95% of the respective regulation voltage.

Innovative PowerTM ActivePMUTM and ActivePathTM are trademarks of Active-Semi. I2CTM is a trademark of NXP.
- 37 -

Copyright 2012 Active-Semi, Inc.

RTC LOW-DROPOUT LINEAR REGULATOR

REGISTER DESCRIPTIONS

Note See Table 1 for default register settings.

Table 16 REG6 Control Register Map

ADDRESS

R Read-Only bits. Default Values May Vary.

Table 17 REG6 Control Register Bit Descriptions

ADDRESS NAME BIT ACCESS

VSET6 [4:0]
[7:5]

DATA

VSET6

FUNCTION

REG6 Output Voltage Selection

See Table 18 READ ONLY

Table 18 REG6/VSETx[ ] Output Voltage Setting

REG6CFG/VSETx[4:3]

REG6CFG/VSETx[2:0]

Innovative PowerTM ActivePMUTM and ActivePathTM are trademarks of Active-Semi. I2CTM is a trademark of NXP.
- 38 -

Copyright 2012 Active-Semi, Inc.

RTC LOW-DROPOUT LINEAR REGULATOR

FUNCTIONAL DESCRIPTION

Output Voltage
By default, REG6's output voltage is as defined in the Ordering Information section. However, this voltage may be programmed by writing to the REG6CFG/VSETx[ ] register via the I2C interface.

Voltage Regulators

REG6 is ideally suited for always-on voltageregulation applications, such as for real-time clock and memory keep-alive applications. This regulator requires only a small ceramic capacitor with a minimum capacitance of 1uF for stability. For best performance, the output capacitor should be connected directly between the output and GA, with a short and direct connection.

Figure 9:

Typical Application of RTC LDO

Backup Battery Charging REG6 features a constant current-limit, which protects the IC under output short-circuit conditions as well as provides a constant charge current, when operating as a backup battery charger.

As shown in Figure 10, REG6 features a CC/CV output characteristic, regulating its output voltage for load currents up to 30mA, and regulating output current when the load exceeds typically 60mA.

Figure 10 REG6 Output Voltage

REG6 Output Voltage vs. Load Current

ACT8810-017

Output Voltage V

Constant Voltage Region Constant Current Region 1

Load Current mA

ACT8810 OUT6

Supper cap or Back-up battery

Innovative PowerTM ActivePMUTM and ActivePathTM are trademarks of Active-Semi. I2CTM is a trademark of NXP.
- 39 -

Copyright 2012 Active-Semi, Inc.

ActivePathTM CHARGER

ELECTRICAL CHARACTERISTICS

VCHG_IN = 5V, TA = 25°C, unless otherwise specified.

PARAMETER

TEST CONDITIONS

ActivePath

CHG_IN Operating Voltage Range

CHG_IN UVLO Threshold

CHG_IN Voltage Rising

CHG_IN UVLO Hysteresis

CHG_IN Voltage Falling

CHG_IN OVP Threshold

CHG_IN Voltage Falling

CHG_IN OVP Hysteresis

CHG_IN Voltage Rising

CHG_IN Supply Current CHG_IN to VSYS On-Resistance

VCHG_IN < VUVLO VCHG_IN < VBAT + 120mV, VCHG_IN > VUVLO VCHG_IN > VBAT + 120mV, VCHG_IN > VUVLO Charger disabled, ISYS = 0mA IVSYS = 100mA ACIN = VSYS

CHG_IN to VSYS Current Limit

ACIN = GA, CHGLEV = GA

ACIN = GA, CHGLEV = VSYS

VSYS AND DCCC REGULATION

VSYS Regulated Voltage DCCC Pull-Up Current
nSTATx OUTPUT
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Datasheet ID: ACT8810QJ3EB-T 522560